354 lines
9.7 KiB
C
354 lines
9.7 KiB
C
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/**
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******************************************************************************
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* @brief SPI header file of the firmware library.
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __GD32F10X_SPI_H
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#define __GD32F10X_SPI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "gd32f10x.h"
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/** @addtogroup GD32F10x_Firmware
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* @{
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*/
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/** @addtogroup SPI
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* @{
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*/
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/** @defgroup SPI_Exported_Types
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* @{
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*/
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/**
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* @brief SPI Initial Parameters
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*/
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typedef struct {
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uint16_t SPI_TransType; /*!< The transfer type, choose one from @ref SPI_transfer_type. */
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uint16_t SPI_Mode; /*!< The operating mode, choose one from @ref SPI_mode. */
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uint16_t SPI_FrameFormat; /*!< The SPI data frame format, choose one from @ref SPI_data_frame_format. */
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uint16_t SPI_SCKPL; /*!< The clock polarity in idel state, choose one from @ref SPI_Clock_Polarity. */
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uint16_t SPI_SCKPH; /*!< The clock phase, choose one from @ref SPI_Clock_Phase. */
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uint16_t SPI_SWNSSEN; /*!< The NSS signal management, choose one from @ref SPI_Software_NSS_management. */
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uint16_t SPI_PSC; /*!< The Baud Rate prescaler value, choose one from @ref SPI_BaudRate_Prescaler. */
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uint16_t SPI_FirstBit; /*!< The data transfers start from MSB or LSB bit, choose one from @ref SPI_MSB_LSB_transmission. */
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uint16_t SPI_CRCPOL; /*!< The polynomial used for the CRC calculation. */
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} SPI_InitPara;
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/**
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* @brief I2S Initial Parameters
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*/
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typedef struct {
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uint16_t I2S_Mode; /*!< The operating mode and transfer direction, choose one from @ref I2S_Mode. */
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uint16_t I2S_STD; /*!< The I2S standard, choose one from @ref I2S_Standard. */
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uint16_t I2S_FrameFormat; /*!< The I2S data length and channel length, choose one from @ref I2S_Data_Format. */
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uint16_t I2S_MCKOE; /*!< The I2S MCK output is enabled or disable, choose one from @ref I2S_MCLK_Output. */
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uint32_t I2S_AudioFreq; /*!< The audio sampling frequency, choose one from @ref I2S_Audio_Frequency. */
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uint16_t I2S_CKPL; /*!< The clock polarity in idel state, choose one from @ref I2S_Clock_Polarity. */
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} I2S_InitPara;
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/**
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* @}
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*/
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/** @defgroup SPI_Exported_Constants
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* @{
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*/
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/** @defgroup SPI_transfer_type
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* @{
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*/
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#define SPI_TRANSTYPE_FULLDUPLEX ((uint16_t)0x0000)
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#define SPI_TRANSTYPE_RXONLY SPI_CTLR1_RO
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#define SPI_TRANSTYPE_BDMRX SPI_CTLR1_BDM
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#define SPI_TRANSTYPE_BDMTX (SPI_CTLR1_BDM | SPI_CTLR1_BDOE)
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/**
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* @}
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*/
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/** @defgroup SPI_mode
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* @{
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*/
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#define SPI_MODE_MASTER (SPI_CTLR1_MSTMODE|SPI_CTLR1_SWNSS)
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#define SPI_MODE_SLAVE ((uint16_t)0x0000)
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/**
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* @}
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*/
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/** @defgroup SPI_data_frame_format
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* @{
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*/
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#define SPI_FRAMEFORMAT_16BIT SPI_CTLR1_FF16
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#define SPI_FRAMEFORMAT_8BIT ((uint16_t)0x0000)
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Polarity
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* @{
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*/
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#define SPI_SCKPL_LOW ((uint16_t)0x0000)
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#define SPI_SCKPL_HIGH SPI_CTLR1_SCKPL
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Phase
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* @{
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*/
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#define SPI_SCKPH_1EDGE ((uint16_t)0x0000)
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#define SPI_SCKPH_2EDGE SPI_CTLR1_SCKPH
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/**
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* @}
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*/
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/** @defgroup SPI_Software_NSS_management
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* @{
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*/
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#define SPI_SWNSS_SOFT SPI_CTLR1_SWNSSEN
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#define SPI_SWNSS_HARD ((uint16_t)0x0000)
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/**
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* @}
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*/
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/** @defgroup SPI_BaudRate_Prescaler
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* @{
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*/
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#define SPI_PSC_2 ((uint16_t)0x0000)
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#define SPI_PSC_4 ((uint16_t)0x0008)
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#define SPI_PSC_8 ((uint16_t)0x0010)
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#define SPI_PSC_16 ((uint16_t)0x0018)
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#define SPI_PSC_32 ((uint16_t)0x0020)
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#define SPI_PSC_64 ((uint16_t)0x0028)
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#define SPI_PSC_128 ((uint16_t)0x0030)
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#define SPI_PSC_256 ((uint16_t)0x0038)
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/**
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* @}
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*/
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/** @defgroup SPI_MSB_LSB_transmission
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* @{
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*/
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#define SPI_FIRSTBIT_MSB ((uint16_t)0x0000)
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#define SPI_FIRSTBIT_LSB SPI_CTLR1_LF
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/**
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* @}
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*/
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/** @defgroup I2S_Mode
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* @{
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*/
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#define I2S_MODE_SLAVETX ((uint16_t)0x0000)
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#define I2S_MODE_SLAVERX ((uint16_t)0x0100)
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#define I2S_MODE_MASTERTX ((uint16_t)0x0200)
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#define I2S_MODE_MASTERRX ((uint16_t)0x0300)
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/**
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* @}
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*/
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/** @defgroup I2S_Standard
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* @{
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*/
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#define I2S_STD_PHILLIPS ((uint16_t)0x0000)
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#define I2S_STD_MSB ((uint16_t)0x0010)
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#define I2S_STD_LSB ((uint16_t)0x0020)
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#define I2S_STD_PCMSHORT ((uint16_t)0x0030)
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#define I2S_STD_PCMLONG ((uint16_t)0x00B0)
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/**
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* @}
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*/
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/** @defgroup I2S_Data_Format
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* @{
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*/
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#define I2S_FRAMEFORMAT_DL16b_CL16b ((uint16_t)0x0000)
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#define I2S_FRAMEFORMAT_DL16b_CL32b ((uint16_t)0x0001)
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#define I2S_FRAMEFORMAT_DL24b_CL32b ((uint16_t)0x0003)
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#define I2S_FRAMEFORMAT_DL32b_CL32b ((uint16_t)0x0005)
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/**
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* @}
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*/
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/** @defgroup I2S_MCLK_Output
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* @{
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*/
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#define I2S_MCK_ENABLE SPI_I2SCKP_MCKOE
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#define I2S_MCK_DISABLE ((uint16_t)0x0000)
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/**
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* @}
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*/
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/** @defgroup I2S_Audio_Frequency
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* @{
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*/
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#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
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#define I2S_AUDIOFREQ_8K ((uint32_t)8000)
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#define I2S_AUDIOFREQ_11K ((uint32_t)11025)
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#define I2S_AUDIOFREQ_16K ((uint32_t)16000)
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#define I2S_AUDIOFREQ_22K ((uint32_t)22050)
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#define I2S_AUDIOFREQ_32K ((uint32_t)32000)
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#define I2S_AUDIOFREQ_44K ((uint32_t)44100)
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#define I2S_AUDIOFREQ_48K ((uint32_t)48000)
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#define I2S_AUDIOFREQ_96K ((uint32_t)96000)
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#define I2S_AUDIOFREQ_192K ((uint32_t)192000)
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/**
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* @}
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*/
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/** @defgroup I2S_Clock_Polarity
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* @{
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*/
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#define I2S_CKPL_LOW ((uint16_t)0x0000)
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#define I2S_CKPL_HIGH SPI_I2SCTLR_CKPL
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_DMA_transfer_requests
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* @{
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*/
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#define SPI_I2S_DMA_TX SPI_CTLR2_DMATE
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#define SPI_I2S_DMA_RX SPI_CTLR2_DMARE
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/**
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* @}
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*/
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/** @defgroup SPI_NSS_internal_software_management
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* @{
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*/
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#define SPI_SWNSS_SET ((uint16_t)0x0001)
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#define SPI_SWNSS_RESET ((uint16_t)0x0000)
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/**
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* @}
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*/
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/** @defgroup SPI_CRC_Transmit_Receive
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* @{
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*/
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#define SPI_CRC_TX ((uint8_t)0x00)
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#define SPI_CRC_RX ((uint8_t)0x01)
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/**
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* @}
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*/
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/** @defgroup SPI_direction_transmit_receive
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* @{
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*/
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#define SPI_BDOE_RX (~SPI_CTLR1_BDOE)
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#define SPI_BDOE_TX SPI_CTLR1_BDOE
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_interrupts_definition
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* @{
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*/
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#define SPI_I2S_INT_TBE ((uint8_t)0x71)
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#define SPI_I2S_INT_RBNE ((uint8_t)0x60)
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#define SPI_I2S_INT_ERR ((uint8_t)0x50)
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#define SPI_I2S_INT_OVR ((uint8_t)0x56)
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#define SPI_INT_MODF ((uint8_t)0x55)
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#define SPI_INT_CRCERR ((uint8_t)0x54)
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#define I2S_INT_UDR ((uint8_t)0x53)
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_flags_definition
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* @{
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*/
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#define SPI_FLAG_RBNE SPI_STR_RBNE
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#define SPI_FLAG_TBE SPI_STR_TBE
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#define SPI_FLAG_CRCERR SPI_STR_CRCE
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#define SPI_FLAG_MODF SPI_STR_CONFE
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#define SPI_FLAG_OVR SPI_STR_RXORE
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#define SPI_FLAG_BSY SPI_STR_TRANS
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#define I2S_FLAG_RBNE SPI_STR_RBNE
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#define I2S_FLAG_TBE SPI_STR_TBE
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#define I2S_FLAG_CHSIDE SPI_STR_I2SCH
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#define I2S_FLAG_UDR SPI_STR_TXURE
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#define I2S_FLAG_OVR SPI_STR_RXORE
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#define I2S_FLAG_BSY SPI_STR_TRANS
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup SPI_Exported_Functions
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* @{
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*/
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void SPI_I2S_DeInit(SPI_TypeDef *SPIx);
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void SPI_Init(SPI_TypeDef *SPIx, SPI_InitPara *SPI_InitParameter);
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void I2S_Init(SPI_TypeDef *SPIx, I2S_InitPara *I2S_InitParameter);
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void SPI_ParaInit(SPI_InitPara *SPI_InitParameter);
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void I2S_ParaInit(I2S_InitPara *I2S_InitParameter);
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void SPI_Enable(SPI_TypeDef *SPIx, TypeState NewValue);
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void I2S_Enable(SPI_TypeDef *SPIx, TypeState NewValue);
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void SPI_I2S_INTConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_INT, TypeState NewValue);
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void SPI_I2S_DMA_Enable(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, TypeState NewValue);
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void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data);
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uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx);
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void SPI_SWNSSConfig(SPI_TypeDef *SPIx, uint16_t SPI_SWNSS);
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void SPI_NSSDRV(SPI_TypeDef *SPIx, TypeState NewValue);
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void SPI_FrameFormatConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize);
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void SPI_SendCRCNext(SPI_TypeDef *SPIx);
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void SPI_CRC_Enable(SPI_TypeDef *SPIx, TypeState NewValue);
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uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC);
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uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx);
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void SPI_BDOEConfig(SPI_TypeDef *SPIx, uint16_t SPI_BDOE);
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TypeState SPI_I2S_GetBitState(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG);
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void SPI_I2S_ClearBitState(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG);
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TypeState SPI_I2S_GetIntBitState(SPI_TypeDef *SPIx, uint8_t SPI_I2S_INT);
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void SPI_I2S_ClearIntBitState(SPI_TypeDef *SPIx, uint8_t SPI_I2S_INT);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__GD32F10X_SPI_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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