2022-11-10 22:22:48 +08:00
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fsdio_pio.c
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* Date: 2022-06-01 14:21:47
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* LastEditTime: 2022-06-01 14:21:47
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2023-05-11 10:25:21 +08:00
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* Description: This file is for PIO transfer related function implementation
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2022-11-10 22:22:48 +08:00
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.1 zhugengyu 2022/6/6 modify according to tech manual.
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*/
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/***************************** Include Files *********************************/
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#include "fio.h"
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#include "fdebug.h"
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#include "fassert.h"
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#include "ftypes.h"
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#include "fsdio_hw.h"
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#include "fsdio.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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#define FSDIO_DEBUG_TAG "FSDIO-PIO"
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#define FSDIO_ERROR(format, ...) FT_DEBUG_PRINT_E(FSDIO_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FSDIO_WARN(format, ...) FT_DEBUG_PRINT_W(FSDIO_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FSDIO_INFO(format, ...) FT_DEBUG_PRINT_I(FSDIO_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FSDIO_DEBUG(format, ...) FT_DEBUG_PRINT_D(FSDIO_DEBUG_TAG, format, ##__VA_ARGS__)
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/************************** Function Prototypes ******************************/
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extern FError FSdioTransferCmd(FSdio *const instance_p, FSdioCmdData *const cmd_data_p);
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extern FError FSdioPollWaitBusyCard(FSdio *const instance_p);
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2022-11-10 22:22:48 +08:00
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/*****************************************************************************/
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/**
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* @name: FSdioPIOWriteData
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* @msg: Write data to fifo
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* @return {FError} FSDIO_SUCCESS if write success
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* @param {FSdio} *instance_p, SDIO controller instance
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* @param {FSdioData} *data_p, contents of transfer data
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*/
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static FError FSdioPIOWriteData(FSdio *const instance_p, FSdioData *data_p)
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{
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FASSERT(data_p);
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FError ret = FSDIO_SUCCESS;
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u32 loop;
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uintptr base_addr = instance_p->config.base_addr;
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const u32 wr_times = data_p->datalen / sizeof(u32); /* u8 --> u32 */
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u32 *wr_buf = (u32 *)data_p->buf;
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/* write fifo data */
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FSDIO_WRITE_REG(base_addr, FSDIO_CMD_OFFSET, FSDIO_CMD_DAT_WRITE);
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for (loop = 0; loop < wr_times; loop++)
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{
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FSDIO_WRITE_REG(base_addr, FSDIO_DATA_OFFSET, wr_buf[loop]);
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}
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return ret;
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}
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/**
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* @name: FSdioPIOReadData
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* @msg: Read data from fifo
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* @return {FError} FSDIO_SUCCESS if read success
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* @param {FSdio} *instance_p, SDIO controller instance
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* @param {FSdioData} *data_p, contents of transfer data
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*/
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FError FSdioPIOReadData(FSdio *const instance_p, FSdioData *data_p)
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{
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FASSERT(data_p);
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FError ret = FSDIO_SUCCESS;
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u32 loop;
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uintptr base_addr = instance_p->config.base_addr;
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const u32 rd_times = data_p->datalen / sizeof(u32); /* u8 --> u32 */
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u32 *rd_buf = (u32 *)data_p->buf;
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/* while in PIO mode, max data transferred is 0x800 */
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if (data_p->datalen > FSDIO_MAX_FIFO_CNT)
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{
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FSDIO_ERROR("Fifo do not support writing more than 0x%x.", FSDIO_MAX_FIFO_CNT);
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2022-11-10 22:22:48 +08:00
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return FSDIO_ERR_NOT_SUPPORT;
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}
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/* read data from fifo */
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for (loop = 0; loop < rd_times; loop++)
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{
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rd_buf[loop] = FSDIO_READ_REG(base_addr, FSDIO_DATA_OFFSET);
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}
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return ret;
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}
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/**
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* @name: FSdioPIOTransfer
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* @msg: Start command and data transfer in PIO mode
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* @return {FError} FSDIO_SUCCESS if transfer success, otherwise failed
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* @param {FSdio} *instance_p, SDIO controller instance
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* @param {FSdioCmdData} *cmd_data_p, contents of transfer command and data
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*/
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FError FSdioPIOTransfer(FSdio *const instance_p, FSdioCmdData *const cmd_data_p)
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{
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FASSERT(instance_p);
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FASSERT(cmd_data_p);
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FError ret = FSDIO_SUCCESS;
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const boolean read = cmd_data_p->flag & FSDIO_CMD_FLAG_READ_DATA;
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uintptr base_addr = instance_p->config.base_addr;
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cmd_data_p->success = FALSE; /* reset cmd transfer status */
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if (FT_COMPONENT_IS_READY != instance_p->is_ready)
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{
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FSDIO_ERROR("device is not yet initialized!!!");
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return FSDIO_ERR_NOT_INIT;
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}
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if (FSDIO_PIO_TRANS_MODE != instance_p->config.trans_mode)
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{
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FSDIO_ERROR("device is not configure in PIO transfer mode.");
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2022-11-10 22:22:48 +08:00
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return FSDIO_ERR_INVALID_STATE;
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}
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/* for removable media, check if card exists */
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if ((FALSE == instance_p->config.non_removable) &&
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(FALSE == FSdioCheckIfCardExists(base_addr)))
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{
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FSDIO_ERROR("card is not detected !!!");
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2022-11-10 22:22:48 +08:00
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return FSDIO_ERR_NO_CARD;
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}
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2023-05-11 10:25:21 +08:00
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/* wait previous command finished and card not busy */
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ret = FSdioPollWaitBusyCard(instance_p);
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if (FSDIO_SUCCESS != ret)
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{
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return ret;
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}
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2022-11-10 22:22:48 +08:00
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/* reset fifo and not use DMA */
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FSDIO_CLR_BIT(base_addr, FSDIO_CNTRL_OFFSET, FSDIO_CNTRL_USE_INTERNAL_DMAC);
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ret = FSdioResetCtrl(base_addr, FSDIO_CNTRL_FIFO_RESET);
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if (FSDIO_SUCCESS != ret)
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{
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return ret;
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2023-05-11 10:25:21 +08:00
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}
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FSDIO_CLR_BIT(base_addr, FSDIO_BUS_MODE_OFFSET, FSDIO_BUS_MODE_DE);
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if (NULL != cmd_data_p->data_p)
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{
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2023-05-11 10:25:21 +08:00
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/* while in PIO mode, max data transferred is 0x800 */
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if (cmd_data_p->data_p->datalen > FSDIO_MAX_FIFO_CNT)
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{
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FSDIO_ERROR("Fifo do not support writing more than 0x%x.", FSDIO_MAX_FIFO_CNT);
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return FSDIO_ERR_NOT_SUPPORT;
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}
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2022-11-10 22:22:48 +08:00
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/* set transfer data length and block size */
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FSdioSetTransBytes(base_addr, cmd_data_p->data_p->datalen);
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FSdioSetBlockSize(base_addr, cmd_data_p->data_p->blksz);
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if (FALSE == read) /* if need to write, write to fifo before send command */
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{
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/* invalide buffer for data to write */
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FSDIO_DATA_BARRIER();
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2022-11-10 22:22:48 +08:00
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ret = FSdioPIOWriteData(instance_p, cmd_data_p->data_p);
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}
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}
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if (FSDIO_SUCCESS == ret) /* send command */
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{
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ret = FSdioTransferCmd(instance_p, cmd_data_p);
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}
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return ret;
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}
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/**
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* @name: FSdioPollWaitPIOEnd
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* @msg: Wait PIO transfer finished by poll
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* @return {FError} FSDIO_SUCCESS if wait success, otherwise wait failed
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* @param {FSdio} *instance_p, SDIO controller instance
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* @param {FSdioCmdData} *cmd_data_p, contents of transfer command and data
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* @param {FSdioRelaxHandler} relax, handler of relax when wait busy
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*/
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FError FSdioPollWaitPIOEnd(FSdio *const instance_p, FSdioCmdData *const cmd_data_p)
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{
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FASSERT(instance_p);
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FASSERT(cmd_data_p);
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FError ret = FSDIO_SUCCESS;
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u32 loop;
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u32 reg_val;
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int delay;
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const boolean read = cmd_data_p->flag & FSDIO_CMD_FLAG_READ_DATA;
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uintptr base_addr = instance_p->config.base_addr;
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if (FT_COMPONENT_IS_READY != instance_p->is_ready)
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{
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FSDIO_ERROR("device is not yet initialized!!!");
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return FSDIO_ERR_NOT_INIT;
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}
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if (FSDIO_PIO_TRANS_MODE != instance_p->config.trans_mode)
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{
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FSDIO_ERROR("device is not configure in PIO transfer mode.");
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return FSDIO_ERR_INVALID_STATE;
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}
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FSDIO_INFO("wait for PIO cmd to finish ...");
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delay = FSDIO_TIMEOUT;
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do
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{
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reg_val = FSdioGetRawStatus(base_addr);
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if (instance_p->relax_handler)
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{
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instance_p->relax_handler();
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}
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}
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while (!(FSDIO_INT_CMD_BIT & reg_val) && (--delay > 0));
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if (!(FSDIO_INT_CMD_BIT & reg_val) && (delay <= 0))
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{
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FSDIO_ERROR("wait cmd done timeout, raw ints: 0x%x", reg_val);
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return FSDIO_ERR_CMD_TIMEOUT;
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}
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/* if need to read data, read fifo after send command */
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if ((NULL != cmd_data_p->data_p) && (read))
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{
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FSDIO_INFO("wait for PIO data to read ...");
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delay = FSDIO_TIMEOUT;
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do
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{
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reg_val = FSdioGetRawStatus(base_addr);
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if (instance_p->relax_handler)
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{
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instance_p->relax_handler();
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}
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}
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while (!(FSDIO_INT_DTO_BIT & reg_val) && (--delay > 0));
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/* clear status to ack */
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FSdioClearRawStatus(base_addr);
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FSDIO_INFO("card cnt: 0x%x, fifo cnt: 0x%x",
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FSDIO_READ_REG(base_addr, FSDIO_TRAN_CARD_CNT_OFFSET),
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FSDIO_READ_REG(base_addr, FSDIO_TRAN_FIFO_CNT_OFFSET));
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if (!(FSDIO_INT_DTO_BIT & reg_val) && (delay <= 0))
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{
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FSDIO_ERROR("wait PIO transfer timeout, raw ints: 0x%x.", reg_val);
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return FSDIO_ERR_TRANS_TIMEOUT;
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}
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}
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/* clear status to ack cmd done */
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FSdioClearRawStatus(base_addr);
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if (FSDIO_SUCCESS == ret)
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{
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ret = FSdioGetCmdResponse(instance_p, cmd_data_p);
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}
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return ret;
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}
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