424 lines
9.7 KiB
ArmAsm
424 lines
9.7 KiB
ArmAsm
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/*
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* Copyright (c) 2006-2020, YICHIP Development Team
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* @file yc_startup_yc3122.s
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* @brief source file for setting startup_yc3122
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*
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* Change Logs:
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* Date Author Version Notes
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* 2020-11-06 wushengyan V1.0.0 the first version
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*/
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#define REGBYTES (4)
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/* Enable interrupts when returning from the handler */
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#define MSTATUS_PRV1 0x1880
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#define MSTATUS_MIE 0x00000008
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#define MSTATUS_FS 0x00006000
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.equ __stack_size,0x9000
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.text
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.globl flash_start
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.globl delay
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.globl __stack_size
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.section .text.startup
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flash_start:
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la sp, _stack
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/* set exception and irq mtvec */
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la a0,trap
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ori a0,a0,1
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csrw mtvec,a0
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/* enable fs */
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li t0,MSTATUS_FS
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csrs mstatus,t0
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csrw fcsr,x0
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/* Load data section */
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la a0, _sidata
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la a1, _sdata
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la a2, _edata
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bgeu a1,a2,2f
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1:
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lw t0, (a0)
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sw t0, (a1)
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addi a0,a0,4
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addi a1,a1,4
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bltu a1,a2,1b
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2:
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/* clear bss section */
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la a0,_sbss
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la a1,_ebss
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bgeu a0,a1,2f
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1:
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sw zero,(a0)
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addi a0,a0,4
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bltu a0,a1,1b
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2:
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/*clear heap/statck*/
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la a0,_ebss
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la a1,_stack
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bgeu a0,a1,2f
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1:
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sw zero,(a0)
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addi a0,a0,4
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bltu a0,a1,1b
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2:
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#ifndef __NO_SYSTEM_INIT
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// jal systeminit
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#endif
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#ifndef __NO_BOARD_INIT
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// jal board_init
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#endif
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li t0, 0x00000800
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csrs 0x304,t0
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li t0, MSTATUS_MIE
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csrs mstatus, t0
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jal main
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/* never retch here*/
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__exit:
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j __exit
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.macro DISABLE_MIE
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csrc mstatus, MSTATUS_MIE
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.endm
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.macro ENABLE_MIE
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csrs mstatus, MSTATUS_MIE
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.endm
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.macro GET_IRQ_NUM
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li t1,0x000E4004
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lw t1,0(t1)
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li t3,0x01
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li t5,0x00
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get_irq_num_loop:
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and t4, t1, t3
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blt x0, t4, get_irq_num_end
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addi t5, t5, 1
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slli t3, t3, 1
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j get_irq_num_loop
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get_irq_num_end:
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mv t1, t5
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.endm
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.macro SAVE_CONTEXT
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addi sp,sp,-40*4
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sw x1 , 0 *REGBYTES(sp) /* ra */
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sw x4 , 1 *REGBYTES(sp) /* tp */
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sw x5 , 2 *REGBYTES(sp) /* t0 */
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sw x6 , 3 *REGBYTES(sp) /* t1 */
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sw x7 , 4 *REGBYTES(sp) /* t2 */
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sw x10, 5 *REGBYTES(sp) /* a0 */
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sw x11, 6 *REGBYTES(sp) /* a1 */
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sw x12, 7 *REGBYTES(sp) /* a2 */
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sw x13, 8 *REGBYTES(sp) /* a3 */
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sw x14, 9 *REGBYTES(sp) /* a4 */
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sw x15, 10*REGBYTES(sp) /* a5 */
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sw x16, 11*REGBYTES(sp) /* a6 */
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sw x17, 12*REGBYTES(sp) /* a7 */
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sw x28, 13*REGBYTES(sp) /* t3 */
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sw x29, 14*REGBYTES(sp) /* t4 */
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sw x30, 15*REGBYTES(sp) /* t5 */
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sw x31, 16*REGBYTES(sp) /* t6 */
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fsw f0, 17*REGBYTES(sp) /* ft0 */
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fsw f1, 18*REGBYTES(sp) /* ft1 */
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fsw f2, 19*REGBYTES(sp) /* ft2 */
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fsw f3, 20*REGBYTES(sp) /* ft3 */
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fsw f4, 21*REGBYTES(sp) /* ft4 */
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fsw f5, 22*REGBYTES(sp) /* ft5 */
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fsw f6, 23*REGBYTES(sp) /* ft6 */
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fsw f7, 24*REGBYTES(sp) /* ft7 */
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fsw f10,25*REGBYTES(sp) /* fa0 */
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fsw f11,26*REGBYTES(sp) /* fa1 */
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fsw f12,27*REGBYTES(sp) /* fa2 */
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fsw f13,28*REGBYTES(sp) /* fa3 */
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fsw f14,29*REGBYTES(sp) /* fa4 */
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fsw f15,30*REGBYTES(sp) /* fa5 */
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fsw f16,31*REGBYTES(sp) /* fa6 */
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fsw f17,32*REGBYTES(sp) /* fa7 */
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fsw f28,33*REGBYTES(sp) /* ft8 */
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fsw f29,34*REGBYTES(sp) /* ft9 */
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fsw f30,35*REGBYTES(sp) /* ft10*/
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fsw f31,36*REGBYTES(sp) /* ft11*/
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.endm
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.macro RESTORE_CONTEXT
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lw x1 , 0 *REGBYTES(sp) /* ra */
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lw x4 , 1 *REGBYTES(sp) /* tp */
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lw x5 , 2 *REGBYTES(sp) /* t0 */
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lw x6 , 3 *REGBYTES(sp) /* t1 */
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lw x7 , 4 *REGBYTES(sp) /* t2 */
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lw x10, 5 *REGBYTES(sp) /* a0 */
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lw x11, 6 *REGBYTES(sp) /* a1 */
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lw x12, 7 *REGBYTES(sp) /* a2 */
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lw x13, 8 *REGBYTES(sp) /* a3 */
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lw x14, 9 *REGBYTES(sp) /* a4 */
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lw x15, 10*REGBYTES(sp) /* a5 */
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lw x16, 11*REGBYTES(sp) /* a6 */
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lw x17, 12*REGBYTES(sp) /* a7 */
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lw x28, 13*REGBYTES(sp) /* t3 */
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lw x29, 14*REGBYTES(sp) /* t4 */
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lw x30, 15*REGBYTES(sp) /* t5 */
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lw x31, 16*REGBYTES(sp) /* t6 */
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flw f0, 17*REGBYTES(sp) /* ft0 */
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flw f1, 18*REGBYTES(sp) /* ft1 */
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flw f2, 19*REGBYTES(sp) /* ft2 */
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flw f3, 20*REGBYTES(sp) /* ft3 */
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flw f4, 21*REGBYTES(sp) /* ft4 */
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flw f5, 22*REGBYTES(sp) /* ft5 */
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flw f6, 23*REGBYTES(sp) /* ft6 */
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flw f7, 24*REGBYTES(sp) /* ft7 */
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flw f10,25*REGBYTES(sp) /* fa0 */
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flw f11,26*REGBYTES(sp) /* fa1 */
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flw f12,27*REGBYTES(sp) /* fa2 */
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flw f13,28*REGBYTES(sp) /* fa3 */
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flw f14,29*REGBYTES(sp) /* fa4 */
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flw f15,30*REGBYTES(sp) /* fa5 */
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flw f16,31*REGBYTES(sp) /* fa6 */
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flw f17,32*REGBYTES(sp) /* fa7 */
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flw f28,33*REGBYTES(sp) /* ft8 */
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flw f29,34*REGBYTES(sp) /* ft9 */
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flw f30,35*REGBYTES(sp) /* ft10*/
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flw f31,36*REGBYTES(sp) /* ft11*/
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addi sp, sp, 40*REGBYTES
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.endm
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.macro SAVE_CSR_CONTEXT
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csrr t0,mepc
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csrr t1,mcause
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sw t0,37*REGBYTES(sp) /* mepc */
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sw t1,38*REGBYTES(sp) /* mcause */
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.endm
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.macro RESTORE_CSR_CONTEXT
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lw t0,37*REGBYTES(sp) /* mepc */
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lw t1,38*REGBYTES(sp) /* mcause */
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csrw mcause, t1
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csrw mepc, t0
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.endm
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.align 2
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.global Default_IRQHandler
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.weak Default_IRQHandler
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.type Default_IRQHandler, %function
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Default_IRQHandler:
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SAVE_CONTEXT
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SAVE_CSR_CONTEXT
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/* get irq */
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la t0,isr_table
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// GET_IRQ_NUM /* t1: irq num */
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li t1,0x000E4004 /* t1: irq num */
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lw t1,0(t1)
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slli t2, t1, 2
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add t0, t0, t2
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lw t2, (t0)
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sw t1,39*REGBYTES(sp)
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ENABLE_MIE
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jalr t2 /* jump to irq */
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DISABLE_MIE
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/* clear pending mask*/
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lw t1,39*REGBYTES(sp)
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li t0,0x000E4004
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sw t1,(t0)
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/* enable pri mie*/
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li t0, MSTATUS_PRV1
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csrs mstatus, t0
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RESTORE_CSR_CONTEXT
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RESTORE_CONTEXT
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mret
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/* trap start*/
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.section .text.trap
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/* In CLIC mode, the exeception entry must be 64bytes aligned */
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.align 6
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.global trap
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.weak trap
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.type trap, %function
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trap:
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/* check for interrupt */
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addi sp,sp,-4
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sw t0,0x0(sp)
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csrr t0,mcause
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blt t0,x0, .Interrupt /* go to Interrupt*/
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addi sp,sp,4
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/* save regs */
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addi sp,sp,-22*4
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sw x1 , 0 *REGBYTES(sp)
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sw x2 , 1 *REGBYTES(sp)
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sw x3 , 2 *REGBYTES(sp)
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sw x4 , 3 *REGBYTES(sp)
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sw x5 , 4 *REGBYTES(sp)
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sw x6 , 5 *REGBYTES(sp)
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sw x7 , 6 *REGBYTES(sp)
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sw x8 , 7 *REGBYTES(sp)
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sw x9 , 8 *REGBYTES(sp)
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sw x10, 9 *REGBYTES(sp)
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sw x11, 10*REGBYTES(sp)
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sw x12, 11*REGBYTES(sp)
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sw x13, 12*REGBYTES(sp)
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sw x14, 13*REGBYTES(sp)
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sw x15, 14*REGBYTES(sp)
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sw x16, 15*REGBYTES(sp)
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sw x17, 16*REGBYTES(sp)
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sw x28, 17*REGBYTES(sp)
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sw x29, 18*REGBYTES(sp)
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sw x30, 19*REGBYTES(sp)
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sw x31, 20*REGBYTES(sp)
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csrr a0, mepc
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sw a0, 21*REGBYTES(sp)
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csrr a0, mstatus
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sw a0, 22*REGBYTES(sp)
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mv a0, sp
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jal trap_c
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/*never reatch here */
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j .
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.Interrupt:
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lw t0, 0x0(sp)
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addi sp, sp, 4
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j Default_IRQHandler
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/* trap end*/
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.global trap_c
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.weak trap_c
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.type trap_c,%function
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trap_c:
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j trap_c
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.align 6
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.weak Default_Handler
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.global Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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j Default_Handler
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.size Default_Handler, . - Default_Handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.weak \handler_name
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.globl \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_handler USB_IRQHandler
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def_irq_handler I2C0_IRQHandler
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def_irq_handler I2C1_IRQHandler
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def_irq_handler QSPI_IRQHandler
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def_irq_handler SPI0_IRQHandler
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def_irq_handler SPI1_IRQHandler
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def_irq_handler HSPI_IRQHandler
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def_irq_handler SEC_IRQHandler
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def_irq_handler UART0_IRQHandler
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def_irq_handler UART1_IRQHandler
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def_irq_handler UART2_IRQHandler
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def_irq_handler UART3_IRQHandler
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def_irq_handler MEMCP_IRQHandler
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def_irq_handler SCI0_IRQHandler
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def_irq_handler SCI1_IRQHandler
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def_irq_handler MSR_IRQHandler
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def_irq_handler GPIO_IRQHandler
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def_irq_handler TMRG0_IRQHandler
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def_irq_handler TMRG1_IRQHandler
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def_irq_handler SDIO_IRQHandler
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def_irq_handler PSARM_IRQHandler
|
||
|
|
def_irq_handler RSA_IRQHandler
|
||
|
|
def_irq_handler SM4_IRQHandler
|
||
|
|
def_irq_handler TRNG_IRQHandler
|
||
|
|
def_irq_handler WDT_IRQHandler
|
||
|
|
def_irq_handler DCMI_IRQHandler
|
||
|
|
def_irq_handler ADC_IRQHandler
|
||
|
|
def_irq_handler RTC_IRQHandler
|
||
|
|
def_irq_handler BIN_IRQHandler
|
||
|
|
def_irq_handler POWER_IRQHandler
|
||
|
|
def_irq_handler SOFTWARE_IRQHandler
|
||
|
|
def_irq_handler IPC_IRQHandler
|
||
|
|
def_irq_handler QR_IRQHandler
|
||
|
|
def_irq_handler ONE_BIN_IRQHandler
|
||
|
|
def_irq_handler SYSTICK_IRQHandler
|
||
|
|
def_irq_handler VBAT_IRQHandler
|
||
|
|
def_irq_handler EXTI0_IRQHandler
|
||
|
|
def_irq_handler EXTI1_IRQHandler
|
||
|
|
def_irq_handler EXTI2_IRQHandler
|
||
|
|
def_irq_handler EXTI3_IRQHandler
|
||
|
|
def_irq_handler EXTI4_IRQHandler
|
||
|
|
|
||
|
|
.align 4
|
||
|
|
isr_table:
|
||
|
|
.long USB_IRQHandler
|
||
|
|
.long I2C0_IRQHandler
|
||
|
|
.long I2C1_IRQHandler
|
||
|
|
.long QSPI_IRQHandler
|
||
|
|
.long SPI0_IRQHandler
|
||
|
|
.long SPI1_IRQHandler
|
||
|
|
.long HSPI_IRQHandler
|
||
|
|
.long SEC_IRQHandler
|
||
|
|
.long UART0_IRQHandler
|
||
|
|
.long UART1_IRQHandler
|
||
|
|
.long UART2_IRQHandler
|
||
|
|
.long UART3_IRQHandler
|
||
|
|
.long MEMCP_IRQHandler
|
||
|
|
.long SCI0_IRQHandler
|
||
|
|
.long SCI1_IRQHandler
|
||
|
|
.long MSR_IRQHandler
|
||
|
|
.long GPIO_IRQHandler
|
||
|
|
.long TMRG0_IRQHandler
|
||
|
|
.long TMRG1_IRQHandler
|
||
|
|
.long SDIO_IRQHandler
|
||
|
|
.long PSARM_IRQHandler
|
||
|
|
.long RSA_IRQHandler
|
||
|
|
.long SM4_IRQHandler
|
||
|
|
.long TRNG_IRQHandler
|
||
|
|
.long WDT_IRQHandler
|
||
|
|
.long DCMI_IRQHandler
|
||
|
|
.long ADC_IRQHandler
|
||
|
|
.long RTC_IRQHandler
|
||
|
|
.long BIN_IRQHandler
|
||
|
|
.long POWER_IRQHandler
|
||
|
|
.long SOFTWARE_IRQHandler
|
||
|
|
.long IPC_IRQHandler
|
||
|
|
.long QR_IRQHandler
|
||
|
|
.long ONE_BIN_IRQHandler
|
||
|
|
.long SYSTICK_IRQHandler
|