2014-07-18 17:17:56 +08:00
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/*
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* File : drv_uart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2013-05-18 Bernard The first version for LPC40xx
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* 2014-07-18 ArdaFu Port to TM4C129X
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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2014-07-20 00:16:37 +08:00
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#include "inc/hw_memmap.h"
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#include "driverlib/sysctl.h"
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#include "driverlib/gpio.h"
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#include "driverlib/uart.h"
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#include "driverlib/pin_map.h"
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#include "driverlib/interrupt.h"
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#include "driverlib/rom_map.h"
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2014-07-18 17:17:56 +08:00
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typedef struct hw_uart_device
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{
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uint32_t hw_base; // base address
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}hw_uart_t;
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2014-07-20 00:16:37 +08:00
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#define mUartGetHwPtr(serial) ((hw_uart_t*)(serial->parent.user_data))
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2014-07-18 17:17:56 +08:00
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static rt_err_t hw_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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2014-07-21 19:09:15 +08:00
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uint32_t config = 0;
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2014-07-18 17:17:56 +08:00
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hw_uart_t* uart;
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RT_ASSERT(serial != RT_NULL);
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2014-07-20 00:16:37 +08:00
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uart = mUartGetHwPtr(serial);
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2014-07-18 17:17:56 +08:00
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MAP_UARTDisable(uart->hw_base);
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2014-07-20 00:16:37 +08:00
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// build UART Configuration parameter structure
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switch(cfg->data_bits)
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{
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case DATA_BITS_9:
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// enable 9bit address mode and set DATA_BIT_8
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MAP_UART9BitEnable(uart->hw_base);
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case DATA_BITS_8:
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config |= UART_CONFIG_WLEN_8;
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break;
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case DATA_BITS_7:
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config |= UART_CONFIG_WLEN_7;
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break;
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case DATA_BITS_6:
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config |= UART_CONFIG_WLEN_6;
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break;
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case DATA_BITS_5:
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config |= UART_CONFIG_WLEN_5;
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break;
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default:
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RT_ASSERT(0);
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break;
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}
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switch(cfg->parity)
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{
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case PARITY_ODD:
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config |= UART_CONFIG_PAR_ODD;
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break;
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case PARITY_EVEN:
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config |= UART_CONFIG_PAR_EVEN;
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break;
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case PARITY_NONE:
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config |= UART_CONFIG_PAR_NONE;
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break;
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default:
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RT_ASSERT(0);
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break;
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}
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switch(cfg->stop_bits)
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{
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case STOP_BITS_1:
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config |= UART_CONFIG_STOP_ONE;
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break;
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case STOP_BITS_2:
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config |= UART_CONFIG_STOP_TWO;
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break;
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default:
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RT_ASSERT(0);
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break;
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}
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// Initialize UART0 peripheral with given to corresponding parameter
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2017-11-06 14:07:31 +08:00
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MAP_UARTConfigSetExpClk(uart->hw_base, SystemCoreClock, cfg->baud_rate, config);
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2014-07-20 00:16:37 +08:00
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MAP_UARTFIFOEnable(uart->hw_base);
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2014-07-18 17:17:56 +08:00
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// Enable the UART.
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MAP_UARTEnable(uart->hw_base);
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return RT_EOK;
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}
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static rt_err_t hw_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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hw_uart_t* uart;
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RT_ASSERT(serial != RT_NULL);
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2014-07-20 00:16:37 +08:00
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uart = mUartGetHwPtr(serial);
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2014-07-18 17:17:56 +08:00
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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MAP_UARTIntDisable(uart->hw_base, UART_INT_RX | UART_INT_RT);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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MAP_UARTIntEnable(uart->hw_base, UART_INT_RX | UART_INT_RT);
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break;
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}
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return RT_EOK;
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}
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static int hw_putc(struct rt_serial_device *serial, char c)
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{
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hw_uart_t* uart;
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RT_ASSERT(serial != RT_NULL);
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2014-07-20 00:16:37 +08:00
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uart = mUartGetHwPtr(serial);
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2014-07-18 17:17:56 +08:00
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MAP_UARTCharPut(uart->hw_base, *((uint8_t *)&c));
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return 1;
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}
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static int hw_getc(struct rt_serial_device *serial)
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{
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hw_uart_t* uart;
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RT_ASSERT(serial != RT_NULL);
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2014-07-20 00:16:37 +08:00
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uart = mUartGetHwPtr(serial);
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2014-07-18 17:17:56 +08:00
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return MAP_UARTCharGetNonBlocking(uart->hw_base);
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}
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static const struct rt_uart_ops hw_uart_ops =
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{
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hw_configure,
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hw_control,
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hw_putc,
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hw_getc,
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};
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#if defined(RT_USING_UART0)
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/* UART0 device driver structure */
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struct rt_serial_device serial0;
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hw_uart_t uart0 =
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{
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UART0_BASE,
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};
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void UART0_IRQHandler(void)
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{
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2014-07-20 00:16:37 +08:00
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uint32_t intsrc;
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2014-07-18 17:17:56 +08:00
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hw_uart_t *uart = &uart0;
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/* enter interrupt */
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rt_interrupt_enter();
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/* Determine the interrupt source */
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2014-07-20 00:16:37 +08:00
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intsrc = MAP_UARTIntStatus(uart->hw_base, true);
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2014-07-18 17:17:56 +08:00
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// Receive Data Available or Character time-out
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if (intsrc & (UART_INT_RX | UART_INT_RT))
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{
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2014-07-20 00:16:37 +08:00
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MAP_UARTIntClear(uart->hw_base, intsrc);
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rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
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2014-07-18 17:17:56 +08:00
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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int rt_hw_uart_init(void)
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{
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hw_uart_t* uart;
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struct serial_configure config;
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2014-07-20 00:16:37 +08:00
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2014-07-18 17:17:56 +08:00
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config.baud_rate = BAUD_RATE_115200;
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config.bit_order = BIT_ORDER_LSB;
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config.data_bits = DATA_BITS_8;
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config.parity = PARITY_NONE;
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config.stop_bits = STOP_BITS_1;
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config.invert = NRZ_NORMAL;
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2014-07-20 00:16:37 +08:00
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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#ifdef RT_USING_UART0
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uart = &uart0;
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2014-07-18 17:17:56 +08:00
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serial0.ops = &hw_uart_ops;
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serial0.config = config;
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MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
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MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
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MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
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2014-07-20 00:16:37 +08:00
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2014-07-18 17:17:56 +08:00
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MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
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MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
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/* preemption = 1, sub-priority = 1 */
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2014-07-21 19:09:15 +08:00
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//IntPrioritySet(INT_UART0, ((0x01 << 5) | 0x01));
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2014-07-18 17:17:56 +08:00
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/* Enable Interrupt for UART channel */
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2014-07-20 00:16:37 +08:00
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UARTIntRegister(uart->hw_base, UART0_IRQHandler);
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MAP_IntEnable(INT_UART0);
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MAP_UARTEnable(uart->hw_base);
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2014-07-18 17:17:56 +08:00
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/* register UART0 device */
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rt_hw_serial_register(&serial0, "uart0",
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2014-07-20 00:16:37 +08:00
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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2014-07-18 17:17:56 +08:00
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uart);
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#endif
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return 0;
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}
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2014-07-31 14:11:26 +08:00
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INIT_BOARD_EXPORT(rt_hw_uart_init);
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