2021-09-02 22:38:47 +08:00
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/*
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2022-01-02 09:14:03 +08:00
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* Copyright (c) 2006-2022, RT-Thread Development Team
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2021-09-02 22:38:47 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-20 BruceOu first implementation
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*/
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2022-01-02 09:14:03 +08:00
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2021-09-02 22:38:47 +08:00
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#include "drv_usart.h"
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#ifdef RT_USING_SERIAL
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#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && \
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!defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
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!defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && \
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!defined(BSP_USING_UART6) && !defined(BSP_USING_UART7)
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#error "Please define at least one UARTx"
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#endif
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#include <rtdevice.h>
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2022-01-02 09:14:03 +08:00
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static void GD32_UART_IRQHandler(struct rt_serial_device *serial);
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2021-09-02 22:38:47 +08:00
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#if defined(BSP_USING_UART0)
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struct rt_serial_device serial0;
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void USART0_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial0);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART0 */
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#if defined(BSP_USING_UART1)
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struct rt_serial_device serial1;
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void USART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial1);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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struct rt_serial_device serial2;
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void USART2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial2);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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struct rt_serial_device serial3;
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void UART3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial3);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART4)
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struct rt_serial_device serial4;
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void UART4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial4);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART4 */
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#if defined(BSP_USING_UART5)
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struct rt_serial_device serial5;
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void USART5_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial5);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART5 */
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#if defined(BSP_USING_UART6)
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struct rt_serial_device serial6;
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void UART6_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial6);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART6 */
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#if defined(BSP_USING_UART7)
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struct rt_serial_device serial7;
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void UART7_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2022-01-02 09:14:03 +08:00
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GD32_UART_IRQHandler(&serial7);
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2021-09-02 22:38:47 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART7 */
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2022-01-02 09:14:03 +08:00
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static const struct gd32_uart uart_obj[] = {
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2021-09-02 22:38:47 +08:00
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#ifdef BSP_USING_UART0
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{
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USART0, // uart peripheral index
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USART0_IRQn, // uart iqrn
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RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOA, GPIO_AF_7, GPIO_PIN_9, // tx port, tx alternate, tx pin
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GPIOA, GPIO_AF_7, GPIO_PIN_10, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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GPIOA, GPIO_PIN_9, // tx port, tx pin
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GPIOA, GPIO_PIN_10, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial0,
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"uart0",
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},
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#endif
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#ifdef BSP_USING_UART1
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{
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USART1, // uart peripheral index
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USART1_IRQn, // uart iqrn
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RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOA, GPIO_AF_7, GPIO_PIN_2, // tx port, tx alternate, tx pin
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GPIOA, GPIO_AF_7, GPIO_PIN_3, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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2022-01-07 21:32:00 +08:00
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GPIOA, GPIO_PIN_2, // tx port, tx pin
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2022-01-02 09:14:03 +08:00
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GPIOA, GPIO_PIN_3, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial1,
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"uart1",
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},
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#endif
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#ifdef BSP_USING_UART2
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{
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USART2, // uart peripheral index
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USART2_IRQn, // uart iqrn
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RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOB, GPIO_AF_7, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOB, GPIO_AF_7, GPIO_PIN_11, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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GPIOB, GPIO_PIN_10, // tx port, tx pin
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GPIOB, GPIO_PIN_11, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial2,
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"uart2",
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},
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#endif
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#ifdef BSP_USING_UART3
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{
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UART3, // uart peripheral index
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UART3_IRQn, // uart iqrn
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RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOC, GPIO_AF_8, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOC, GPIO_AF_8, GPIO_PIN_11, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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GPIOC, GPIO_PIN_10, // tx port, tx pin
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GPIOC, GPIO_PIN_11, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial3,
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"uart3",
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},
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#endif
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#ifdef BSP_USING_UART4
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{
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UART4, // uart peripheral index
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UART4_IRQn, // uart iqrn
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RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOC, GPIO_AF_8, GPIO_PIN_12, // tx port, tx alternate, tx pin
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GPIOD, GPIO_AF_8, GPIO_PIN_2, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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2022-01-07 21:32:00 +08:00
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GPIOC, GPIO_PIN_12, // tx port, tx pin
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2022-01-02 09:14:03 +08:00
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GPIOD, GPIO_PIN_2, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial4,
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"uart4",
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},
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#endif
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#ifdef BSP_USING_UART5
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{
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USART5, // uart peripheral index
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USART5_IRQn, // uart iqrn
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RCU_USART5, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOC, GPIO_AF_8, GPIO_PIN_6, // tx port, tx alternate, tx pin
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GPIOC, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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2022-01-07 21:32:00 +08:00
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GPIOC, GPIO_PIN_6, // tx port, tx pin
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2022-01-02 09:14:03 +08:00
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GPIOC, GPIO_PIN_7, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial5,
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"uart5",
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},
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#endif
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#ifdef BSP_USING_UART6
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{
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UART6, // uart peripheral index
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UART6_IRQn, // uart iqrn
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RCU_UART6, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOE, GPIO_AF_8, GPIO_PIN_7, // tx port, tx alternate, tx pin
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GPIOE, GPIO_AF_8, GPIO_PIN_8, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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GPIOE, GPIO_PIN_7, // tx port, tx pin
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GPIOE, GPIO_PIN_8, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial6,
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"uart6",
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},
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#endif
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#ifdef BSP_USING_UART7
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{
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UART7, // uart peripheral index
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UART7_IRQn, // uart iqrn
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RCU_UART7, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
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GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
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2022-01-02 09:14:03 +08:00
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#else
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2022-01-07 21:32:00 +08:00
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GPIOE, GPIO_PIN_0, // tx port, tx pin
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2022-01-02 09:14:03 +08:00
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GPIOE, GPIO_PIN_1, // rx port, rx pin
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#endif
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2021-09-02 22:38:47 +08:00
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&serial7,
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"uart7",
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},
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#endif
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};
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/**
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* @brief UART MSP Initialization
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* This function configures the hardware resources used in this example:
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* - Peripheral's clock enable
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* - Peripheral's GPIO Configuration
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* - NVIC configuration for UART interrupt request enable
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* @param huart: UART handle pointer
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* @retval None
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*/
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void gd32_uart_gpio_init(struct gd32_uart *uart)
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{
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/* enable USART clock */
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rcu_periph_clock_enable(uart->tx_gpio_clk);
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rcu_periph_clock_enable(uart->rx_gpio_clk);
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rcu_periph_clock_enable(uart->per_clk);
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2022-01-02 09:14:03 +08:00
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#if defined SOC_SERIES_GD32F4xx
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2021-09-02 22:38:47 +08:00
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/* connect port to USARTx_Tx */
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gpio_af_set(uart->tx_port, uart->tx_af, uart->tx_pin);
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/* connect port to USARTx_Rx */
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gpio_af_set(uart->rx_port, uart->rx_af, uart->rx_pin);
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/* configure USART Tx as alternate function push-pull */
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gpio_mode_set(uart->tx_port, GPIO_MODE_AF, GPIO_PUPD_PULLUP, uart->tx_pin);
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gpio_output_options_set(uart->tx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->tx_pin);
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/* configure USART Rx as alternate function push-pull */
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gpio_mode_set(uart->rx_port, GPIO_MODE_AF, GPIO_PUPD_PULLUP, uart->rx_pin);
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gpio_output_options_set(uart->rx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->rx_pin);
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2022-01-02 09:14:03 +08:00
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#else
|
|
|
|
/* connect port to USARTx_Tx */
|
|
|
|
gpio_init(uart->tx_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, uart->tx_pin);
|
|
|
|
|
|
|
|
/* connect port to USARTx_Rx */
|
|
|
|
gpio_init(uart->rx_port, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, uart->rx_pin);
|
|
|
|
#endif
|
|
|
|
|
2021-09-02 22:38:47 +08:00
|
|
|
NVIC_SetPriority(uart->irqn, 0);
|
|
|
|
NVIC_EnableIRQ(uart->irqn);
|
|
|
|
}
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
/**
|
|
|
|
* @brief uart configure
|
|
|
|
* @param serial, cfg
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static rt_err_t gd32_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
|
|
|
struct gd32_uart *uart;
|
|
|
|
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
RT_ASSERT(cfg != RT_NULL);
|
|
|
|
|
|
|
|
uart = (struct gd32_uart *)serial->parent.user_data;
|
|
|
|
|
|
|
|
gd32_uart_gpio_init(uart);
|
|
|
|
|
|
|
|
usart_baudrate_set(uart->uart_periph, cfg->baud_rate);
|
|
|
|
|
|
|
|
switch (cfg->data_bits)
|
|
|
|
{
|
|
|
|
case DATA_BITS_9:
|
|
|
|
usart_word_length_set(uart->uart_periph, USART_WL_9BIT);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
usart_word_length_set(uart->uart_periph, USART_WL_8BIT);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (cfg->stop_bits)
|
|
|
|
{
|
|
|
|
case STOP_BITS_2:
|
|
|
|
usart_stop_bit_set(uart->uart_periph, USART_STB_2BIT);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
usart_stop_bit_set(uart->uart_periph, USART_STB_1BIT);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (cfg->parity)
|
|
|
|
{
|
|
|
|
case PARITY_ODD:
|
|
|
|
usart_parity_config(uart->uart_periph, USART_PM_ODD);
|
|
|
|
break;
|
|
|
|
case PARITY_EVEN:
|
|
|
|
usart_parity_config(uart->uart_periph, USART_PM_EVEN);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
usart_parity_config(uart->uart_periph, USART_PM_NONE);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
usart_receive_config(uart->uart_periph, USART_RECEIVE_ENABLE);
|
|
|
|
usart_transmit_config(uart->uart_periph, USART_TRANSMIT_ENABLE);
|
|
|
|
usart_enable(uart->uart_periph);
|
|
|
|
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
/**
|
|
|
|
* @brief uart control
|
|
|
|
* @param serial, arg
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static rt_err_t gd32_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
|
|
|
struct gd32_uart *uart;
|
|
|
|
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = (struct gd32_uart *)serial->parent.user_data;
|
|
|
|
|
|
|
|
switch (cmd)
|
|
|
|
{
|
|
|
|
case RT_DEVICE_CTRL_CLR_INT:
|
|
|
|
/* disable rx irq */
|
|
|
|
NVIC_DisableIRQ(uart->irqn);
|
|
|
|
/* disable interrupt */
|
|
|
|
usart_interrupt_disable(uart->uart_periph, USART_INT_RBNE);
|
|
|
|
|
|
|
|
break;
|
|
|
|
case RT_DEVICE_CTRL_SET_INT:
|
|
|
|
/* enable rx irq */
|
|
|
|
NVIC_EnableIRQ(uart->irqn);
|
|
|
|
/* enable interrupt */
|
|
|
|
usart_interrupt_enable(uart->uart_periph, USART_INT_RBNE);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
/**
|
|
|
|
* @brief uart put char
|
|
|
|
* @param serial, ch
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static int gd32_uart_putc(struct rt_serial_device *serial, char ch)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
|
|
|
struct gd32_uart *uart;
|
|
|
|
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = (struct gd32_uart *)serial->parent.user_data;
|
|
|
|
|
|
|
|
usart_data_transmit(uart->uart_periph, ch);
|
2022-03-04 13:49:28 +08:00
|
|
|
while((usart_flag_get(uart->uart_periph, USART_FLAG_TBE) == RESET));
|
2021-09-02 22:38:47 +08:00
|
|
|
|
2021-09-04 09:48:56 +08:00
|
|
|
return RT_EOK;
|
2021-09-02 22:38:47 +08:00
|
|
|
}
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
/**
|
|
|
|
* @brief uart get char
|
|
|
|
* @param serial
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static int gd32_uart_getc(struct rt_serial_device *serial)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
|
|
|
int ch;
|
|
|
|
struct gd32_uart *uart;
|
|
|
|
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = (struct gd32_uart *)serial->parent.user_data;
|
|
|
|
|
|
|
|
ch = -1;
|
|
|
|
if (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET)
|
|
|
|
ch = usart_data_receive(uart->uart_periph);
|
|
|
|
return ch;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Uart common interrupt process. This need add to uart ISR.
|
|
|
|
*
|
|
|
|
* @param serial serial device
|
|
|
|
*/
|
2022-01-02 09:14:03 +08:00
|
|
|
static void GD32_UART_IRQHandler(struct rt_serial_device *serial)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
|
|
|
struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data;
|
|
|
|
|
|
|
|
RT_ASSERT(uart != RT_NULL);
|
|
|
|
|
|
|
|
/* UART in mode Receiver -------------------------------------------------*/
|
|
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RBNE) != RESET) &&
|
|
|
|
(usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET))
|
|
|
|
{
|
|
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
|
|
|
/* Clear RXNE interrupt flag */
|
|
|
|
usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct rt_uart_ops gd32_uart_ops =
|
|
|
|
{
|
2022-01-02 09:14:03 +08:00
|
|
|
.configure = gd32_uart_configure,
|
|
|
|
.control = gd32_uart_control,
|
|
|
|
.putc = gd32_uart_putc,
|
|
|
|
.getc = gd32_uart_getc,
|
2022-01-07 21:32:00 +08:00
|
|
|
RT_NULL,
|
2021-09-02 22:38:47 +08:00
|
|
|
};
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
/**
|
|
|
|
* @brief uart init
|
|
|
|
* @param None
|
|
|
|
* @retval None
|
|
|
|
*/
|
2022-06-28 19:43:00 +08:00
|
|
|
int rt_hw_usart_init(void)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
|
|
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
|
|
|
int i;
|
|
|
|
|
2022-01-07 21:32:00 +08:00
|
|
|
int result;
|
2021-09-02 22:38:47 +08:00
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
for (i = 0; i < sizeof(uart_obj) / sizeof(uart_obj[0]); i++)
|
2021-09-02 22:38:47 +08:00
|
|
|
{
|
2022-01-02 09:14:03 +08:00
|
|
|
uart_obj[i].serial->ops = &gd32_uart_ops;
|
|
|
|
uart_obj[i].serial->config = config;
|
2021-09-02 22:38:47 +08:00
|
|
|
|
|
|
|
/* register UART1 device */
|
2022-01-02 09:14:03 +08:00
|
|
|
result = rt_hw_serial_register(uart_obj[i].serial,
|
|
|
|
uart_obj[i].device_name,
|
2021-09-02 22:38:47 +08:00
|
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
2022-01-02 09:14:03 +08:00
|
|
|
(void *)&uart_obj[i]);
|
2022-01-07 21:32:00 +08:00
|
|
|
RT_ASSERT(result == RT_EOK);
|
2021-09-02 22:38:47 +08:00
|
|
|
}
|
|
|
|
|
2021-09-04 09:48:56 +08:00
|
|
|
return result;
|
2021-09-02 22:38:47 +08:00
|
|
|
}
|
2022-01-02 09:14:03 +08:00
|
|
|
|
2022-06-28 19:43:00 +08:00
|
|
|
INIT_BOARD_EXPORT(rt_hw_usart_init);
|
2022-01-02 09:14:03 +08:00
|
|
|
|
2021-09-02 22:38:47 +08:00
|
|
|
#endif
|