572 lines
15 KiB
C
572 lines
15 KiB
C
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/*
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* Copyright (c) 2006-2023
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-06-05 zengjianwei first version
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*/
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#include <board.h>
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#include <gd32f30x.h>
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#include <rtdevice.h>
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#include <rtthread.h>
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#ifdef RT_USING_PWM
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//#define DRV_DEBUG
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#define LOG_TAG "drv.pwm"
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#include <rtdbg.h>
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#define MAX_PERIOD 65535
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#define MIN_PERIOD 3
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#define MIN_PULSE 2
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typedef struct
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{
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rt_int8_t TimerIndex; // timer index:0~13
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rt_uint32_t Port; // gpio port:GPIOA/GPIOB/GPIOC/...
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rt_uint32_t pin; // gpio pin:GPIO_PIN_0~GPIO_PIN_15
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rt_uint16_t channel; // timer channel
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char *name;
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} TIMER_PORT_CHANNEL_MAP_S;
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struct gd32_pwm
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{
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struct rt_device_pwm pwm_device;
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TIMER_PORT_CHANNEL_MAP_S tim_handle;
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};
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static struct gd32_pwm gd32_pwm_obj[] = {
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#ifdef RT_USING_PWM1
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm1"}},
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#endif
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#ifdef RT_USING_PWM2
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm2"}},
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#endif
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#ifdef RT_USING_PWM3
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm3"}},
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#endif
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#ifdef RT_USING_PWM4
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm4"}},
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#endif
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#ifdef RT_USING_PWM5
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm5"}},
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#endif
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#ifdef RT_USING_PWM6
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm6"}},
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#endif
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#ifdef RT_USING_PWM7
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm7"}},
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#endif
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#ifdef RT_USING_PWM8
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm8"}},
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#endif
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#ifdef RT_USING_PWM9
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm9"}},
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#endif
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#ifdef RT_USING_PWM10
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm10"}},
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#endif
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#ifdef RT_USING_PWM11
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm11"}},
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#endif
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#ifdef RT_USING_PWM12
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm12"}},
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#endif
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#ifdef RT_USING_PWM13
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm13"}},
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#endif
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#ifdef RT_USING_PWM14
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{.tim_handle = {3, GPIOB, GPIO_PIN_8, 2, "pwm14"}},
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#endif
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};
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typedef struct
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{
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rt_uint32_t Port[7];
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rt_int8_t TimerIndex[14];
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} TIMER_PERIPH_LIST_S;
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static TIMER_PERIPH_LIST_S gd32_timer_periph_list = {
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.Port = {0, 0, 0, 0, 0, 0, 0},
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.TimerIndex = {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},
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};
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/*
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* 将所有用到的 gpio port 和 timer 不重复地列举出来，以方便后面不重复地初始化
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*/
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static rt_err_t pwm_find_timer_periph(void)
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{
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rt_int16_t i, j, k;
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/* find gpio port of defined table */
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for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); ++i)
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{
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/* find -1 of gd32_periph_list's member of Port */
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for (j = 0; j < sizeof(gd32_timer_periph_list.Port) / sizeof(gd32_timer_periph_list.Port[0]); ++j)
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{
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if (0 == gd32_timer_periph_list.Port[j])
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{
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break;
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}
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}
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if (j >= sizeof(gd32_timer_periph_list.Port) / sizeof(gd32_timer_periph_list.Port[0]))
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{
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LOG_E("Can not find -1 of gd32_periph_list's member of Port!\n");
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break;
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}
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/* find the different of Port */
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for (k = 0; k < j; ++k)
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{
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if (gd32_pwm_obj[i].tim_handle.Port == gd32_timer_periph_list.Port[k])
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{
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break;
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}
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}
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/* if can not find the same Port */
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if (k == j)
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{
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gd32_timer_periph_list.Port[j] = gd32_pwm_obj[i].tim_handle.Port;
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}
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}
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/* find timer periph of defined table */
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for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); ++i)
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{
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/* find -1 of gd32_periph_list's member of TimerIndex */
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for (j = 0; j < sizeof(gd32_timer_periph_list.TimerIndex) / sizeof(gd32_timer_periph_list.TimerIndex[0]); ++j)
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{
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if (-1 == gd32_timer_periph_list.TimerIndex[j])
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{
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break;
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}
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}
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if (j >= sizeof(gd32_timer_periph_list.TimerIndex) / sizeof(gd32_timer_periph_list.TimerIndex[0]))
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{
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LOG_E("Can not find -1 of gd32_periph_list's member of TimerIndex!\n");
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break;
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}
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/* find the different of TimerIndex */
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for (k = 0; k < j; ++k)
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{
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if (gd32_pwm_obj[i].tim_handle.TimerIndex == gd32_timer_periph_list.TimerIndex[k])
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{
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break;
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}
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}
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/* if can not find the same TimerIndex */
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if (k == j)
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{
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gd32_timer_periph_list.TimerIndex[j] = gd32_pwm_obj[i].tim_handle.TimerIndex;
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}
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}
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return RT_EOK;
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}
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static rt_uint32_t index_to_timer(rt_int8_t TimerIndex)
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{
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switch (TimerIndex)
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{
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case 0:
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return TIMER0;
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case 1:
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return TIMER1;
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case 2:
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return TIMER2;
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case 3:
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return TIMER3;
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case 4:
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return TIMER4;
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case 5:
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return TIMER5;
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case 6:
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return TIMER6;
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case 7:
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return TIMER7;
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case 8:
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return TIMER8;
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case 9:
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return TIMER9;
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case 10:
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return TIMER10;
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case 11:
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return TIMER11;
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case 12:
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return TIMER12;
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case 13:
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return TIMER13;
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default:
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LOG_E("Unsport timer periph!\n");
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}
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return TIMER0;
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}
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static void gpio_clock_enable(rt_uint32_t Port)
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{
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switch (Port)
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{
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case GPIOA:
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rcu_periph_clock_enable(RCU_GPIOA);
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break;
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case GPIOB:
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rcu_periph_clock_enable(RCU_GPIOB);
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break;
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case GPIOC:
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rcu_periph_clock_enable(RCU_GPIOC);
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break;
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case GPIOD:
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rcu_periph_clock_enable(RCU_GPIOD);
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break;
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case GPIOE:
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rcu_periph_clock_enable(RCU_GPIOE);
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break;
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case GPIOF:
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rcu_periph_clock_enable(RCU_GPIOF);
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break;
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case GPIOG:
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rcu_periph_clock_enable(RCU_GPIOG);
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break;
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default:
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LOG_E("Unsport gpio port!\n");
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}
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}
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static void timer_clock_enable(rt_int8_t TimerIndex)
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{
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switch (TimerIndex)
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{
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case 0:
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rcu_periph_clock_enable(RCU_TIMER0);
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break;
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case 1:
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rcu_periph_clock_enable(RCU_TIMER1);
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break;
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case 2:
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rcu_periph_clock_enable(RCU_TIMER2);
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break;
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case 3:
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rcu_periph_clock_enable(RCU_TIMER3);
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break;
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case 4:
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rcu_periph_clock_enable(RCU_TIMER4);
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break;
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case 5:
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rcu_periph_clock_enable(RCU_TIMER5);
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break;
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case 6:
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rcu_periph_clock_enable(RCU_TIMER6);
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break;
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case 7:
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rcu_periph_clock_enable(RCU_TIMER7);
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break;
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#ifndef GD32F30X_HD
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case 8:
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rcu_periph_clock_enable(RCU_TIMER8);
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break;
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case 9:
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rcu_periph_clock_enable(RCU_TIMER9);
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break;
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case 10:
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rcu_periph_clock_enable(RCU_TIMER10);
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break;
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case 11:
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rcu_periph_clock_enable(RCU_TIMER11);
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break;
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case 12:
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rcu_periph_clock_enable(RCU_TIMER12);
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break;
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case 13:
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rcu_periph_clock_enable(RCU_TIMER13);
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break;
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#endif
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default:
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LOG_E("Unsport timer periph!\n");
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}
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}
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static void rcu_config(void)
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{
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rt_int16_t i;
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for (i = 0; i < sizeof(gd32_timer_periph_list.Port) / sizeof(gd32_timer_periph_list.Port[0]); ++i)
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{
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if (0 == gd32_timer_periph_list.Port[i])
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{
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break;
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}
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/* enable GPIO clock */
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gpio_clock_enable(gd32_timer_periph_list.Port[i]);
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}
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rcu_periph_clock_enable(RCU_AF);
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for (i = 0; i < sizeof(gd32_timer_periph_list.TimerIndex) / sizeof(gd32_timer_periph_list.TimerIndex[0]); ++i)
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{
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if (-1 == gd32_timer_periph_list.TimerIndex[i])
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{
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break;
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}
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/* enable timer clock */
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timer_clock_enable(gd32_timer_periph_list.TimerIndex[i]);
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timer_deinit(index_to_timer(gd32_timer_periph_list.TimerIndex[i]));
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}
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}
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static void gpio_config(void)
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{
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rt_int16_t i;
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/* config the GPIO as analog mode */
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for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); ++i)
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{
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gpio_init(gd32_pwm_obj[i].tim_handle.Port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, gd32_pwm_obj[i].tim_handle.pin);
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}
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}
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static void timer_init_para(timer_parameter_struct *initpara)
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{
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rt_int16_t i;
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for (i = 0; i < sizeof(gd32_timer_periph_list.TimerIndex) / sizeof(gd32_timer_periph_list.TimerIndex[0]); ++i)
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{
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/* config timer */
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if (-1 != gd32_timer_periph_list.TimerIndex[i])
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{
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timer_init(index_to_timer(gd32_timer_periph_list.TimerIndex[i]), initpara);
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|
}
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static void channel_output_config(timer_oc_parameter_struct *ocpara)
|
|||
|
|
{
|
|||
|
|
rt_int16_t i;
|
|||
|
|
rt_uint32_t timer_periph;
|
|||
|
|
|
|||
|
|
/* config the channel config */
|
|||
|
|
for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); ++i)
|
|||
|
|
{
|
|||
|
|
timer_periph = index_to_timer(gd32_pwm_obj[i].tim_handle.TimerIndex);
|
|||
|
|
timer_channel_output_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, ocpara);
|
|||
|
|
|
|||
|
|
timer_channel_output_pulse_value_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, 7999);
|
|||
|
|
timer_channel_output_mode_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_OC_MODE_PWM0);
|
|||
|
|
timer_channel_output_shadow_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_OC_SHADOW_DISABLE);
|
|||
|
|
/* auto-reload preload shadow reg enable */
|
|||
|
|
// timer_auto_reload_shadow_enable(timer_periph);
|
|||
|
|
timer_channel_output_state_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_CCX_DISABLE);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* enable timer */
|
|||
|
|
for (i = 0; i < sizeof(gd32_timer_periph_list.TimerIndex) / sizeof(gd32_timer_periph_list.TimerIndex[0]); ++i)
|
|||
|
|
{
|
|||
|
|
if (-1 != gd32_timer_periph_list.TimerIndex[i])
|
|||
|
|
{
|
|||
|
|
timer_periph = index_to_timer(gd32_timer_periph_list.TimerIndex[i]);
|
|||
|
|
timer_enable(timer_periph);
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static void timer_config(void)
|
|||
|
|
{
|
|||
|
|
timer_oc_parameter_struct timer_ocintpara;
|
|||
|
|
timer_parameter_struct timer_initpara;
|
|||
|
|
|
|||
|
|
/* TIMER configuration */
|
|||
|
|
timer_initpara.prescaler = 119;
|
|||
|
|
timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
|
|||
|
|
timer_initpara.counterdirection = TIMER_COUNTER_UP;
|
|||
|
|
timer_initpara.period = 15999;
|
|||
|
|
timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
|
|||
|
|
timer_initpara.repetitioncounter = 0;
|
|||
|
|
timer_init_para(&timer_initpara);
|
|||
|
|
|
|||
|
|
/* CHX configuration in PWM mode */
|
|||
|
|
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
|||
|
|
timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
|
|||
|
|
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
|||
|
|
timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
|
|||
|
|
timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
|
|||
|
|
timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
|
|||
|
|
channel_output_config(&timer_ocintpara);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static rt_err_t drv_pwm_enable(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_pwm_configuration *configuration,
|
|||
|
|
rt_bool_t enable)
|
|||
|
|
{
|
|||
|
|
if (!enable)
|
|||
|
|
{
|
|||
|
|
timer_channel_output_state_config(index_to_timer(pstTimerMap->TimerIndex), configuration->channel,
|
|||
|
|
TIMER_CCX_DISABLE);
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
timer_channel_output_state_config(index_to_timer(pstTimerMap->TimerIndex), configuration->channel,
|
|||
|
|
TIMER_CCX_ENABLE);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return RT_EOK;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static rt_err_t drv_pwm_get(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_pwm_configuration *configuration)
|
|||
|
|
{
|
|||
|
|
rt_uint64_t tim_clock;
|
|||
|
|
rt_uint16_t psc;
|
|||
|
|
rt_uint32_t chxcv;
|
|||
|
|
|
|||
|
|
tim_clock = rcu_clock_freq_get(CK_SYS);
|
|||
|
|
|
|||
|
|
psc = timer_prescaler_read(index_to_timer(pstTimerMap->TimerIndex));
|
|||
|
|
if (psc == TIMER_CKDIV_DIV2)
|
|||
|
|
{
|
|||
|
|
tim_clock = tim_clock / 2;
|
|||
|
|
}
|
|||
|
|
else if (psc == TIMER_CKDIV_DIV4)
|
|||
|
|
{
|
|||
|
|
tim_clock = tim_clock / 4;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
chxcv = timer_channel_capture_value_register_read(index_to_timer(pstTimerMap->TimerIndex), configuration->channel);
|
|||
|
|
/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
|
|||
|
|
tim_clock /= 1000000UL;
|
|||
|
|
configuration->period = (TIMER_CAR(index_to_timer(pstTimerMap->TimerIndex)) + 1) * (psc + 1) * 1000UL / tim_clock;
|
|||
|
|
configuration->pulse = (chxcv + 1) * (psc + 1) * 1000UL / tim_clock;
|
|||
|
|
|
|||
|
|
return RT_EOK;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static rt_err_t drv_pwm_set(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_pwm_configuration *configuration)
|
|||
|
|
{
|
|||
|
|
rt_uint32_t period, pulse;
|
|||
|
|
rt_uint64_t tim_clock, psc;
|
|||
|
|
|
|||
|
|
tim_clock = rcu_clock_freq_get(CK_SYS);
|
|||
|
|
|
|||
|
|
/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
|
|||
|
|
tim_clock /= 1000000UL;
|
|||
|
|
period = (unsigned long long)configuration->period * tim_clock / 1000ULL;
|
|||
|
|
psc = period / MAX_PERIOD + 1;
|
|||
|
|
period = period / psc;
|
|||
|
|
|
|||
|
|
timer_prescaler_config(index_to_timer(pstTimerMap->TimerIndex), psc - 1, TIMER_PSC_RELOAD_NOW);
|
|||
|
|
|
|||
|
|
if (period < MIN_PERIOD)
|
|||
|
|
{
|
|||
|
|
period = MIN_PERIOD;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
timer_autoreload_value_config(index_to_timer(pstTimerMap->TimerIndex), period - 1);
|
|||
|
|
|
|||
|
|
pulse = (unsigned long long)configuration->pulse * tim_clock / psc / 1000ULL;
|
|||
|
|
if (pulse < MIN_PULSE)
|
|||
|
|
{
|
|||
|
|
pulse = MIN_PULSE;
|
|||
|
|
}
|
|||
|
|
else if (pulse > period)
|
|||
|
|
{
|
|||
|
|
pulse = period;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
timer_channel_output_pulse_value_config(index_to_timer(pstTimerMap->TimerIndex), configuration->channel, pulse);
|
|||
|
|
timer_counter_value_config(index_to_timer(pstTimerMap->TimerIndex), 0);
|
|||
|
|
|
|||
|
|
/* Update frequency value */
|
|||
|
|
timer_event_software_generate(index_to_timer(pstTimerMap->TimerIndex), TIMER_EVENT_SRC_UPG);
|
|||
|
|
|
|||
|
|
return RT_EOK;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
|
|||
|
|
{
|
|||
|
|
struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
|
|||
|
|
TIMER_PORT_CHANNEL_MAP_S *pstTimerMap = (TIMER_PORT_CHANNEL_MAP_S *)device->parent.user_data;
|
|||
|
|
|
|||
|
|
switch (cmd)
|
|||
|
|
{
|
|||
|
|
case PWM_CMD_ENABLE:
|
|||
|
|
return drv_pwm_enable(pstTimerMap, configuration, RT_TRUE);
|
|||
|
|
case PWM_CMD_DISABLE:
|
|||
|
|
return drv_pwm_enable(pstTimerMap, configuration, RT_FALSE);
|
|||
|
|
case PWM_CMD_SET:
|
|||
|
|
return drv_pwm_set(pstTimerMap, configuration);
|
|||
|
|
case PWM_CMD_GET:
|
|||
|
|
return drv_pwm_get(pstTimerMap, configuration);
|
|||
|
|
default:
|
|||
|
|
return RT_EINVAL;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static struct rt_pwm_ops drv_ops = {drv_pwm_control};
|
|||
|
|
|
|||
|
|
static rt_err_t gd32_hw_pwm_init(void)
|
|||
|
|
{
|
|||
|
|
pwm_find_timer_periph();
|
|||
|
|
rcu_config();
|
|||
|
|
gpio_config();
|
|||
|
|
timer_config();
|
|||
|
|
|
|||
|
|
return RT_EOK;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
static int gd32_pwm_init(void)
|
|||
|
|
{
|
|||
|
|
int i = 0;
|
|||
|
|
int result = RT_EOK;
|
|||
|
|
|
|||
|
|
/* pwm init */
|
|||
|
|
if (gd32_hw_pwm_init() != RT_EOK)
|
|||
|
|
{
|
|||
|
|
LOG_E("PWM init failed");
|
|||
|
|
result = -RT_ERROR;
|
|||
|
|
goto __exit;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
LOG_D("PWM init success");
|
|||
|
|
|
|||
|
|
for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); i++)
|
|||
|
|
{
|
|||
|
|
/* register pwm device */
|
|||
|
|
if (rt_device_pwm_register(&gd32_pwm_obj[i].pwm_device, gd32_pwm_obj[i].tim_handle.name, &drv_ops,
|
|||
|
|
&gd32_pwm_obj[i].tim_handle) == RT_EOK)
|
|||
|
|
{
|
|||
|
|
LOG_D("%s register success", gd32_pwm_obj[i].tim_handle.name);
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
LOG_E("%s register failed", gd32_pwm_obj[i].tim_handle.name);
|
|||
|
|
result = -RT_ERROR;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
__exit:
|
|||
|
|
return result;
|
|||
|
|
}
|
|||
|
|
INIT_DEVICE_EXPORT(gd32_pwm_init);
|
|||
|
|
#endif /* RT_USING_PWM */
|