190 lines
10 KiB
C
190 lines
10 KiB
C
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/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
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*
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* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
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*the the People's Republic of China and other countries.
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* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
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*
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* DISCLAIMER
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* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
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* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
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* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
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* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
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* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
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* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
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* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
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* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
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* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
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* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CLK_H__
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#define __CLK_H__
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#include "ccu.h"
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#include "../common_ccmu.h"
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/************************************************************************************************
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* @Function: clk_init
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* @Description: implement for initialize soc clocks during the system power-on startup phase
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* @Parameters:
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* # void: No parameters required
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* @Return values:
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* # HAL_CLK_STATUS_OK: soc clocks initialize successed
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* # others : soc clocks initialization may have some abnormal problems
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* @Attention: clock initialize timing depands on specific soc platform clock design
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*************************************************************************************************/
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hal_clk_status_t clk_init(void);
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struct clk *clk_get(hal_clk_type_t type, hal_clk_id_t id);
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hal_clk_status_t clk_put(struct clk *clk);
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/************************************************************************************************
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* @Function: clk_get_rate
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* @Description: implement for factor-clk, bus-clk and periph-clk get current rate cached witch may not current Runtime rate
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid
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* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled
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* # others: return rate cached successed
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_get_rate(struct clk *clk, u32 *rate);
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/************************************************************************************************
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* @Function: clk_set_rate
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* @Description: implement for bus-clk and periph-clk to set new rate
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* # rate: the new rate value
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid
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* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability
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* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_OK: set new rate successed
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_set_rate(struct clk *clk, u32 rate);
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/************************************************************************************************
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* @Function: clk_recalc_rate
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* @Description: implement for factor-clk, bus-clk and periph-clk to recalculate current Runtime rate
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal
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* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled
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* # others: return current clock rate successed
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_recalc_rate(struct clk *clk, u32 *prate);
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/************************************************************************************************
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* @Function: clk_round_rate
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* @Description: implement for for factor-clk, bus-clk and periph-clk round target rate to the most suitable rate
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* # rate: the target rate form API-User
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid
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* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled
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* # others: return round rate successed
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_round_rate(struct clk *clk, u32 rate, u32 *prate);
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/************************************************************************************************
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* @Function: clk_is_enabled
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* @Description: implement for bus-clk and periph-clk to get clock enabled statue
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid
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* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability
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* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_ENABLED: clock current status is enabled
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* # HAL_CLK_STATUS_DISABLED: clock current status is disabled
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_is_enabled(struct clk *clk);
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/************************************************************************************************
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* @Function: clk_prepare_enable
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* @Description: implement for bus-clk and periph-clk to enable clock
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid
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* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability
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* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_ENABLED: clock current status is enabled
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* # HAL_CLK_STATUS_DISABLED: clock current status is disabled
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_prepare_enable(struct clk *clk);
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/************************************************************************************************
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* @Function: clk_disable_unprepare
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* @Description: implement for bus-clk and periph-clk to disable clock
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* @Parameters:
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* # clk: clock-id of soc specific clock
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* @Return values:
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* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid
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* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability
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* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver
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* # HAL_CLK_STATUS_OK: clock current status disabled successed
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* @Attention: .etc
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*************************************************************************************************/
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hal_clk_status_t clk_disable_unprepare(struct clk *clk);
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/************************************************************************************************
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* @Function: clk_get_parent
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* @Description: implement for factor-clk, bus-clk and periph-clk to select parent clock
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* @Parameters:
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* # clk: clock-id of soc specific clock witch nedds to adjust parent clock
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* # parent: clock-id of soc specific clock's parent clock
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* @Return values:
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* # HAL_CLK_STATUS_OK: soc specific clock select and siwtch parent clock successed
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* # others : soc specific clock select and siwtch parent clock may have some abnormal problems
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* @Attention: soc specific clock and parent clock must be according to the SOC_User_Manual definition
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*************************************************************************************************/
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struct clk *clk_get_parent(struct clk *clk);
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/************************************************************************************************
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* @Function: clk_set_parent
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* @Description: implement for factor-clk, bus-clk and periph-clk to select parent clock
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* @Parameters:
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* # clk: clock-id of soc specific clock witch nedds to adjust parent clock
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* # parent: clock-id of soc specific clock's parent clock
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* @Return values:
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* # HAL_CLK_STATUS_OK: soc specific clock select and siwtch parent clock successed
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* # others : soc specific clock select and siwtch parent clock may have some abnormal problems
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* @Attention: soc specific clock and parent clock must be according to the SOC_User_Manual definition
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*************************************************************************************************/
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hal_clk_status_t clk_set_parent(struct clk *clk, struct clk *p_clk);
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#endif /* __HAL_CLOCK_H__ */
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