111 lines
4.3 KiB
C
111 lines
4.3 KiB
C
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/* generated HAL source file - do not edit */
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#include "hal_data.h"
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sci_uart_instance_ctrl_t g_uart0_ctrl;
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#define FSP_NOT_DEFINED (1)
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#if (FSP_NOT_DEFINED) != (FSP_NOT_DEFINED)
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/* If the transfer module is DMAC, define a DMAC transfer callback. */
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extern void sci_uart_tx_dmac_callback(sci_uart_instance_ctrl_t * p_instance_ctrl);
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void g_uart0_tx_transfer_callback (transfer_callback_args_t * p_args)
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{
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FSP_PARAMETER_NOT_USED(p_args);
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sci_uart_tx_dmac_callback(&g_uart0_ctrl);
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}
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#endif
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#if (FSP_NOT_DEFINED) != (FSP_NOT_DEFINED)
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/* If the transfer module is DMAC, define a DMAC transfer callback. */
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extern void sci_uart_rx_dmac_callback(sci_uart_instance_ctrl_t * p_instance_ctrl);
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void g_uart0_rx_transfer_callback (transfer_callback_args_t * p_args)
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{
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FSP_PARAMETER_NOT_USED(p_args);
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sci_uart_rx_dmac_callback(&g_uart0_ctrl);
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}
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#endif
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#undef FSP_NOT_DEFINED
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sci_baud_setting_t g_uart0_baud_setting =
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{
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/* Baud rate calculated with 0.160% error. */ .baudrate_bits_b.abcse = 0, .baudrate_bits_b.abcs = 0, .baudrate_bits_b.bgdm = 1, .baudrate_bits_b.cks = 0, .baudrate_bits_b.brr = 51, .baudrate_bits_b.mddr = (uint8_t) 256, .baudrate_bits_b.brme = false
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};
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/** UART extended configuration for UARTonSCI HAL driver */
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const sci_uart_extended_cfg_t g_uart0_cfg_extend =
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{
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.clock = SCI_UART_CLOCK_INT,
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.rx_edge_start = SCI_UART_START_BIT_FALLING_EDGE,
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.noise_cancel = SCI_UART_NOISE_CANCELLATION_DISABLE,
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.rx_fifo_trigger = SCI_UART_RX_FIFO_TRIGGER_MAX,
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.p_baud_setting = &g_uart0_baud_setting,
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#if 1
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.clock_source = SCI_UART_CLOCK_SOURCE_SCI0ASYNCCLK,
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#else
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.clock_source = SCI_UART_CLOCK_SOURCE_PCLKM,
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#endif
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.flow_control = SCI_UART_FLOW_CONTROL_RTS,
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#if 0xFF != 0xFF
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.flow_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
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#else
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.flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
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#endif
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.rs485_setting = {
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.enable = SCI_UART_RS485_DISABLE,
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.polarity = SCI_UART_RS485_DE_POLARITY_HIGH,
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.assertion_time = 1,
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.negation_time = 1,
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},
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};
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/** UART interface configuration */
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const uart_cfg_t g_uart0_cfg =
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{
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.channel = 0,
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.data_bits = UART_DATA_BITS_8,
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.parity = UART_PARITY_OFF,
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.stop_bits = UART_STOP_BITS_1,
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.p_callback = user_uart0_callback,
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.p_context = NULL,
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.p_extend = &g_uart0_cfg_extend,
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.p_transfer_tx = g_uart0_P_TRANSFER_TX,
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.p_transfer_rx = g_uart0_P_TRANSFER_RX,
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.rxi_ipl = (12),
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.txi_ipl = (12),
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.tei_ipl = (12),
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.eri_ipl = (12),
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#if defined(VECTOR_NUMBER_SCI0_RXI)
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.rxi_irq = VECTOR_NUMBER_SCI0_RXI,
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#else
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.rxi_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_SCI0_TXI)
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.txi_irq = VECTOR_NUMBER_SCI0_TXI,
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#else
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.txi_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_SCI0_TEI)
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.tei_irq = VECTOR_NUMBER_SCI0_TEI,
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#else
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.tei_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_SCI0_ERI)
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.eri_irq = VECTOR_NUMBER_SCI0_ERI,
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#else
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.eri_irq = FSP_INVALID_VECTOR,
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#endif
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};
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/* Instance structure to use this module. */
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const uart_instance_t g_uart0 =
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{
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.p_ctrl = &g_uart0_ctrl,
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.p_cfg = &g_uart0_cfg,
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.p_api = &g_uart_on_sci
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};
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void g_hal_init(void) {
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g_common_init();
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}
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