448 lines
12 KiB
C
448 lines
12 KiB
C
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/*
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* Copyright 2017-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_RDC_H_
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#define _FSL_RDC_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup rdc
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* @{
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*/
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/******************************************************************************
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* Definitions
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*****************************************************************************/
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#define FSL_RDC_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
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#define RDC_ACCESS_POLICY(domainID, policy) (uint16_t)((uint16_t)(policy) << ((domainID)*2U))
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/*!
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* @brief RDC hardware configuration.
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*/
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typedef struct _rdc_hardware_config
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{
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uint32_t domainNumber : 4; /*!< Number of domains. */
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uint32_t masterNumber : 8; /*!< Number of bus masters. */
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uint32_t periphNumber : 8; /*!< Number of peripherals. */
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uint32_t memNumber : 8; /*!< Number of memory regions. */
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uint32_t : 4;
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} rdc_hardware_config_t;
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/*!
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* @brief RDC interrupts
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*/
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enum _rdc_interrupts
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{
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kRDC_RestoreCompleteInterrupt = RDC_INTCTRL_RCI_EN_MASK,
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/*!< Interrupt generated when the RDC has completed restoring state to a recently re-powered memory regions. */
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};
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/*!
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* @brief RDC status
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*/
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enum _rdc_flags
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{
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kRDC_PowerDownDomainOn = RDC_STAT_PDS_MASK, /*!< Power down domain is ON. */
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};
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/*!
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* @brief Master domain assignment.
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*/
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typedef struct _rdc_domain_assignment
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{
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uint32_t domainId : 2U; /*!< Domain ID. */
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uint32_t : 29U; /*!< Reserved. */
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uint32_t lock : 1U; /*!< Lock the domain assignment. */
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} rdc_domain_assignment_t;
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/*!
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* @brief Access permission policy.
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*/
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enum _rdc_access_policy
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{
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kRDC_NoAccess = 0, /*!< Could not read or write. */
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kRDC_WriteOnly = 1, /*!< Write only. */
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kRDC_ReadOnly = 2, /*!< Read only. */
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kRDC_ReadWrite = 3, /*!< Read and write. */
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};
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/*!
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* @brief Peripheral domain access permission configuration.
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*/
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typedef struct _rdc_periph_access_config
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{
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rdc_periph_t periph; /*!< Peripheral name. */
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bool lock; /*!< Lock the permission until reset. */
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bool enableSema; /*!< Enable semaphore or not, when enabled, master should
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call @ref RDC_SEMA42_Lock to lock the semaphore gate
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accordingly before access the peripheral. */
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uint16_t policy; /*!< Access policy. */
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} rdc_periph_access_config_t;
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/*!
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* @brief Memory region domain access control configuration.
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*
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* Note that when setting the @ref baseAddress and @ref endAddress,
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* should be aligned to the region resolution, see rdc_mem_t
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* definitions.
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*/
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typedef struct _rdc_mem_access_config
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{
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rdc_mem_t mem; /*!< Memory region descriptor name. */
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bool lock; /*!< Lock the configuration. */
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uint64_t baseAddress; /*!< Start address of the memory region. */
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uint64_t endAddress; /*!< End address of the memory region. */
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uint16_t policy; /*!< Access policy. */
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} rdc_mem_access_config_t;
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/*!
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* @brief Memory region access violation status.
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*/
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typedef struct _rdc_mem_status
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{
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bool hasViolation; /*!< Violating happens or not. */
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uint8_t domainID; /*!< Violating Domain ID. */
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uint64_t address; /*!< Violating Address. */
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} rdc_mem_status_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Initializes the RDC module.
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*
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* This function enables the RDC clock.
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*
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* @param base RDC peripheral base address.
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*/
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void RDC_Init(RDC_Type *base);
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/*!
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* @brief De-initializes the RDC module.
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*
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* This function disables the RDC clock.
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*
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* @param base RDC peripheral base address.
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*/
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void RDC_Deinit(RDC_Type *base);
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/*!
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* @brief Gets the RDC hardware configuration.
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*
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* This function gets the RDC hardware configurations, including number of bus
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* masters, number of domains, number of memory regions and number of peripherals.
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*
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* @param base RDC peripheral base address.
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* @param config Pointer to the structure to get the configuration.
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*/
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void RDC_GetHardwareConfig(RDC_Type *base, rdc_hardware_config_t *config);
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/*!
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* @brief Enable interrupts.
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*
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* @param base RDC peripheral base address.
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* @param mask Interrupts to enable, it is OR'ed value of enum @ref _rdc_interrupts.
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*/
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static inline void RDC_EnableInterrupts(RDC_Type *base, uint32_t mask)
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{
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base->INTCTRL |= mask;
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}
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/*!
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* @brief Disable interrupts.
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*
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* @param base RDC peripheral base address.
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* @param mask Interrupts to disable, it is OR'ed value of enum @ref _rdc_interrupts.
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*/
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static inline void RDC_DisableInterrupts(RDC_Type *base, uint32_t mask)
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{
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base->INTCTRL &= ~mask;
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}
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/*!
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* @brief Get the interrupt pending status.
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*
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* @param base RDC peripheral base address.
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* @return Interrupts pending status, it is OR'ed value of enum @ref _rdc_interrupts.
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*/
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static inline uint32_t RDC_GetInterruptStatus(RDC_Type *base)
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{
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return base->INTSTAT;
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}
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/*!
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* @brief Clear interrupt pending status.
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*
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* @param base RDC peripheral base address.
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* @param mask Status to clear, it is OR'ed value of enum @ref _rdc_interrupts.
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*/
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static inline void RDC_ClearInterruptStatus(RDC_Type *base, uint32_t mask)
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{
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base->INTSTAT = mask;
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}
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/*!
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* @brief Get RDC status.
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*
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* @param base RDC peripheral base address.
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* @return mask RDC status, it is OR'ed value of enum @ref _rdc_flags.
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*/
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static inline uint32_t RDC_GetStatus(RDC_Type *base)
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{
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return base->STAT;
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}
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/*!
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* @brief Clear RDC status.
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*
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* @param base RDC peripheral base address.
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* @param mask RDC status to clear, it is OR'ed value of enum @ref _rdc_flags.
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*/
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static inline void RDC_ClearStatus(RDC_Type *base, uint32_t mask)
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{
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base->STAT = mask;
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}
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/*!
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* @brief Set master domain assignment
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*
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* @param base RDC peripheral base address.
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* @param master Which master to set.
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* @param domainAssignment Pointer to the assignment.
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*/
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void RDC_SetMasterDomainAssignment(RDC_Type *base,
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rdc_master_t master,
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const rdc_domain_assignment_t *domainAssignment);
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/*!
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* @brief Get default master domain assignment
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*
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* The default configuration is:
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* @code
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assignment->domainId = 0U;
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assignment->lock = 0U;
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@endcode
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*
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* @param domainAssignment Pointer to the assignment.
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*/
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void RDC_GetDefaultMasterDomainAssignment(rdc_domain_assignment_t *domainAssignment);
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/*!
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* @brief Lock master domain assignment
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*
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* Once locked, it could not be unlocked until next reset.
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*
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* @param base RDC peripheral base address.
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* @param master Which master to lock.
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*/
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static inline void RDC_LockMasterDomainAssignment(RDC_Type *base, rdc_master_t master)
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{
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assert((uint32_t)master < RDC_MDA_COUNT);
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base->MDA[master] |= RDC_MDA_LCK_MASK;
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__DSB();
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}
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/*!
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* @brief Set peripheral access policy.
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*
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* @param base RDC peripheral base address.
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* @param config Pointer to the policy configuration.
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*/
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void RDC_SetPeriphAccessConfig(RDC_Type *base, const rdc_periph_access_config_t *config);
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/*!
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* @brief Get default peripheral access policy.
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*
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* The default configuration is:
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* @code
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config->lock = false;
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config->enableSema = false;
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config->policy = RDC_ACCESS_POLICY(0, kRDC_ReadWrite) |
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RDC_ACCESS_POLICY(1, kRDC_ReadWrite) |
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RDC_ACCESS_POLICY(2, kRDC_ReadWrite) |
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RDC_ACCESS_POLICY(3, kRDC_ReadWrite);
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@endcode
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*
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* @param config Pointer to the policy configuration.
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*/
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void RDC_GetDefaultPeriphAccessConfig(rdc_periph_access_config_t *config);
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/*!
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* @brief Lock peripheral access policy configuration.
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*
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* Once locked, it could not be unlocked until reset.
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*
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* @param base RDC peripheral base address.
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* @param periph Which peripheral to lock.
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*/
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static inline void RDC_LockPeriphAccessConfig(RDC_Type *base, rdc_periph_t periph)
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{
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assert((uint32_t)periph < RDC_PDAP_COUNT);
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base->PDAP[periph] |= RDC_PDAP_LCK_MASK;
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__DSB();
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}
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/*!
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* @brief Get the peripheral access policy for specific domain.
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*
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* @param base RDC peripheral base address.
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* @param periph Which peripheral to get.
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* @param domainId Get policy for which domain.
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* @return Access policy, see @ref _rdc_access_policy.
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*/
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static inline uint8_t RDC_GetPeriphAccessPolicy(RDC_Type *base, rdc_periph_t periph, uint8_t domainId)
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{
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assert((uint32_t)periph < RDC_PDAP_COUNT);
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return (uint8_t)((base->PDAP[periph] >> (domainId * 2U)) & 0x03U);
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}
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/*!
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* @brief Set memory region access policy.
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*
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* Note that when setting the baseAddress and endAddress in @p config,
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* should be aligned to the region resolution, see rdc_mem_t
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* definitions.
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*
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* @param base RDC peripheral base address.
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* @param config Pointer to the policy configuration.
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*/
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void RDC_SetMemAccessConfig(RDC_Type *base, const rdc_mem_access_config_t *config);
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/*!
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* @brief Get default memory region access policy.
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*
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* The default configuration is:
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* @code
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config->lock = false;
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config->baseAddress = 0;
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config->endAddress = 0;
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config->policy = RDC_ACCESS_POLICY(0, kRDC_ReadWrite) |
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RDC_ACCESS_POLICY(1, kRDC_ReadWrite) |
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RDC_ACCESS_POLICY(2, kRDC_ReadWrite) |
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RDC_ACCESS_POLICY(3, kRDC_ReadWrite);
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@endcode
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*
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* @param config Pointer to the policy configuration.
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*/
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void RDC_GetDefaultMemAccessConfig(rdc_mem_access_config_t *config);
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/*!
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* @brief Lock memory access policy configuration.
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*
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* Once locked, it could not be unlocked until reset. After locked, you can
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* only call @ref RDC_SetMemAccessValid to enable the configuration, but can not
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* disable it or change other settings.
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*
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* @param base RDC peripheral base address.
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* @param mem Which memory region to lock.
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*/
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static inline void RDC_LockMemAccessConfig(RDC_Type *base, rdc_mem_t mem)
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{
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assert((uint32_t)mem < RDC_MRC_COUNT);
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base->MR[mem].MRC |= RDC_MRC_LCK_MASK;
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__DSB();
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}
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/*!
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* @brief Enable or disable memory access policy configuration.
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*
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* @param base RDC peripheral base address.
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* @param mem Which memory region to operate.
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* @param valid Pass in true to valid, false to invalid.
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*/
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static inline void RDC_SetMemAccessValid(RDC_Type *base, rdc_mem_t mem, bool valid)
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{
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assert((uint32_t)mem < RDC_MRC_COUNT);
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if (valid)
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{
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base->MR[mem].MRC |= RDC_MRC_ENA_MASK;
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}
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else
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{
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base->MR[mem].MRC &= ~RDC_MRC_ENA_MASK;
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}
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__DSB();
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}
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/*!
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* @brief Get the memory region violation status.
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*
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* The first access violation is captured. Subsequent violations are ignored
|
||
|
|
* until the status register is cleared. Contents are cleared upon reading the
|
||
|
|
* register. Clearing of contents occurs only when the status is read by the
|
||
|
|
* memory region's associated domain ID(s).
|
||
|
|
*
|
||
|
|
* @param base RDC peripheral base address.
|
||
|
|
* @param mem Which memory region to get.
|
||
|
|
* @param status The returned status.
|
||
|
|
*/
|
||
|
|
void RDC_GetMemViolationStatus(RDC_Type *base, rdc_mem_t mem, rdc_mem_status_t *status);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Clear the memory region violation flag.
|
||
|
|
*
|
||
|
|
* @param base RDC peripheral base address.
|
||
|
|
* @param mem Which memory region to clear.
|
||
|
|
*/
|
||
|
|
static inline void RDC_ClearMemViolationFlag(RDC_Type *base, rdc_mem_t mem)
|
||
|
|
{
|
||
|
|
assert((uint32_t)mem < RDC_MRC_COUNT);
|
||
|
|
|
||
|
|
base->MR[mem].MRVS = RDC_MRVS_AD_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Get the memory region access policy for specific domain.
|
||
|
|
*
|
||
|
|
* @param base RDC peripheral base address.
|
||
|
|
* @param mem Which memory region to get.
|
||
|
|
* @param domainId Get policy for which domain.
|
||
|
|
* @return Access policy, see @ref _rdc_access_policy.
|
||
|
|
*/
|
||
|
|
static inline uint8_t RDC_GetMemAccessPolicy(RDC_Type *base, rdc_mem_t mem, uint8_t domainId)
|
||
|
|
{
|
||
|
|
assert((uint32_t)mem < RDC_MRC_COUNT);
|
||
|
|
|
||
|
|
return (uint8_t)((base->MR[mem].MRC >> (domainId * 2U)) & 0x03U);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the domain ID of the current bus master.
|
||
|
|
*
|
||
|
|
* This function returns the domain ID of the current bus master.
|
||
|
|
*
|
||
|
|
* @param base RDC peripheral base address.
|
||
|
|
* @return Domain ID of current bus master.
|
||
|
|
*/
|
||
|
|
static inline uint8_t RDC_GetCurrentMasterDomainId(RDC_Type *base)
|
||
|
|
{
|
||
|
|
return (uint8_t)((base->STAT & RDC_STAT_DID_MASK) >> RDC_STAT_DID_SHIFT);
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(__cplusplus)
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* _FSL_RDC_H_ */
|