2018-09-02 18:44:28 +08:00
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/*
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2018-11-16 20:30:56 +08:00
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* Copyright (c) 2006-2018, RT-Thread Development Team
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2018-09-02 18:44:28 +08:00
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*
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2018-11-16 20:30:56 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2018-09-02 18:44:28 +08:00
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*
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* Change Logs:
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* Date Author Notes
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* 2009-09-22 Bernard add board.h to this bsp
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* 2018-09-02 xuzhuoyi modify for TMS320F28379D version
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*/
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#include <rtthread.h>
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#include "board.h"
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2019-03-27 13:09:19 +08:00
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#include "drv_sci.h"
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2018-09-02 18:44:28 +08:00
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#include "F28x_Project.h"
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2018-09-03 00:03:06 +08:00
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extern interrupt void RTOSINT_Handler();
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2018-09-02 18:44:28 +08:00
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/**
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* This is the timer interrupt service routine.
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*
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*/
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2019-03-27 13:09:19 +08:00
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interrupt void cpu_timer2_isr(void)
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2018-09-02 18:44:28 +08:00
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{
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2019-04-07 18:19:16 +08:00
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CpuTimer2Regs.TCR.all = 0xC000;
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2018-09-02 18:44:28 +08:00
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial STM32 board.
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*/
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void rt_hw_board_init()
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{
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/* Configure the system clock @ 84 Mhz */
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InitSysCtrl();
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DINT;
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InitPieCtrl();
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IER = 0x0000;
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IFR = 0x0000;
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InitPieVectTable();
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EALLOW; // This is needed to write to EALLOW protected registers
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PieVectTable.TIMER2_INT = &cpu_timer2_isr;
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2018-09-03 00:03:06 +08:00
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PieVectTable.RTOS_INT = &RTOSINT_Handler;
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2018-09-02 18:44:28 +08:00
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EDIS;
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InitCpuTimers();
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ConfigCpuTimer(&CpuTimer2, 200, 1000000 / RT_TICK_PER_SECOND);
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CpuTimer2Regs.TCR.all = 0x4000;
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IER |= M_INT14;
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#ifdef RT_USING_HEAP
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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2019-03-27 13:09:19 +08:00
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rt_hw_sci_init();
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2018-09-02 18:44:28 +08:00
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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}
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