2019-03-11 17:39:53 +08:00
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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2021-06-04 18:58:22 +08:00
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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2019-03-11 17:39:53 +08:00
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* Change Logs:
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* Date Author Notes
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* 2019-03-11 wangyq the first version
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2019-11-04 10:05:14 +08:00
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* 2019-11-01 wangyq update libraries
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2021-06-04 18:58:22 +08:00
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* 2021-04-20 liuhy the second version
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2019-03-11 17:39:53 +08:00
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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2021-06-04 18:58:22 +08:00
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#include "es_conf_info_pwm.h"
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2019-03-11 17:39:53 +08:00
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2019-03-15 15:33:29 +08:00
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2021-06-04 18:58:22 +08:00
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#ifdef RT_USING_PWM
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2019-03-15 15:33:29 +08:00
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static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, uint32_t ns)
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{
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2019-11-04 10:05:14 +08:00
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uint64_t tmp = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
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2019-03-19 09:26:47 +08:00
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(timer_initstruct->init.prescaler + 1);
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2019-03-15 15:33:29 +08:00
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if (ch == TIMER_CHANNEL_1)
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WRITE_REG(timer_initstruct->perh->CCVAL1, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_2)
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WRITE_REG(timer_initstruct->perh->CCVAL2, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_3)
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WRITE_REG(timer_initstruct->perh->CCVAL3, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_4)
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WRITE_REG(timer_initstruct->perh->CCVAL4, (uint32_t)tmp);
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}
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2019-03-11 17:39:53 +08:00
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static rt_err_t es32f0_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
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{
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rt_err_t ret = RT_EOK;
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2021-06-04 18:58:22 +08:00
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uint64_t _arr,bus_speed,tmp;
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uint32_t _maxcnt,_ccep_ch_en = 0U;
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2019-03-11 17:39:53 +08:00
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timer_channel_t pwm_channel;
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timer_oc_init_t tim_ocinit;
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timer_handle_t *timer_initstruct = (timer_handle_t *)device->parent.user_data;
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struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration *)arg;
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RT_ASSERT(timer_initstruct != RT_NULL);
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/* select pwm output channel */
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2019-03-15 15:33:29 +08:00
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if (1 == cfg->channel)
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2019-03-11 17:39:53 +08:00
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{
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pwm_channel = TIMER_CHANNEL_1;
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2021-06-04 18:58:22 +08:00
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_ccep_ch_en = timer_initstruct->perh->CCEP & TIMER_CCEP_CC1EN_MSK;
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2019-03-11 17:39:53 +08:00
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}
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2021-10-10 03:33:43 +08:00
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else if (2 == cfg->channel)
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2019-03-11 17:39:53 +08:00
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{
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pwm_channel = TIMER_CHANNEL_2;
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2021-06-04 18:58:22 +08:00
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_ccep_ch_en = timer_initstruct->perh->CCEP & TIMER_CCEP_CC2EN_MSK;
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2019-03-11 17:39:53 +08:00
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}
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2021-10-10 03:33:43 +08:00
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else if (3 == cfg->channel)
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2019-03-11 17:39:53 +08:00
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{
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pwm_channel = TIMER_CHANNEL_3;
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2021-06-04 18:58:22 +08:00
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_ccep_ch_en = timer_initstruct->perh->CCEP & TIMER_CCEP_CC3EN_MSK;
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2019-03-11 17:39:53 +08:00
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}
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2021-10-10 03:33:43 +08:00
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else if (4 == cfg->channel)
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2019-03-11 17:39:53 +08:00
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{
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pwm_channel = TIMER_CHANNEL_4;
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2021-06-04 18:58:22 +08:00
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_ccep_ch_en = timer_initstruct->perh->CCEP & TIMER_CCEP_CC4EN_MSK;
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2019-03-11 17:39:53 +08:00
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}
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else
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return RT_EINVAL;
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2021-10-10 03:33:43 +08:00
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2019-03-11 17:39:53 +08:00
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switch (cmd)
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{
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case PWM_CMD_ENABLE:
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2019-11-04 10:05:14 +08:00
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ald_timer_pwm_start(timer_initstruct, pwm_channel);
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2019-03-11 17:39:53 +08:00
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break;
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case PWM_CMD_DISABLE:
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2019-11-04 10:05:14 +08:00
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ald_timer_pwm_stop(timer_initstruct, pwm_channel);
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2019-03-11 17:39:53 +08:00
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break;
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case PWM_CMD_SET:
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2021-10-10 03:33:43 +08:00
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2021-06-04 18:58:22 +08:00
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/*当通道没开的时候:关通道,设置输出模式和极性,初始化通道*/
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2021-10-10 03:33:43 +08:00
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if(!_ccep_ch_en)
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{
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tim_ocinit.oc_mode = ES_PWM_OC_MODE;
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2021-06-04 18:58:22 +08:00
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tim_ocinit.oc_polarity = ES_PWM_OC_POLARITY;
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tim_ocinit.oc_fast_en = DISABLE;
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tim_ocinit.ocn_polarity = TIMER_OCN_POLARITY_HIGH;
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tim_ocinit.ocn_idle = TIMER_OCN_IDLE_RESET;
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tim_ocinit.oc_idle = TIMER_OC_IDLE_RESET;
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ald_timer_oc_config_channel(timer_initstruct, &tim_ocinit, pwm_channel);
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}
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2021-10-10 03:33:43 +08:00
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2021-06-04 18:58:22 +08:00
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bus_speed = (uint64_t)ald_cmu_get_pclk1_clock();
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/*外设的计数器最大值*/
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_maxcnt = 0xFFFF;
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2021-10-10 03:33:43 +08:00
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2021-06-04 18:58:22 +08:00
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/*当最大分频 <= _maxcnt时:估计大概的分频,加快速度 */
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tmp = bus_speed * (cfg->period)/1000000000/_maxcnt;
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timer_initstruct->init.prescaler = (tmp > 2U) ? (tmp - 2U) : 0U ; /*bus_speed < 500000000*/
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2021-10-10 03:33:43 +08:00
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2021-06-04 18:58:22 +08:00
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/* count registers max , auto adjust prescaler */
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2019-03-11 17:39:53 +08:00
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do
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{
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2021-06-04 18:58:22 +08:00
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_arr = bus_speed * (cfg->period) / 1000000000 /(++timer_initstruct->init.prescaler);
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2021-10-10 03:33:43 +08:00
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2019-03-11 17:39:53 +08:00
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}
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2021-10-10 03:33:43 +08:00
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while (_arr > _maxcnt);
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2021-06-04 18:58:22 +08:00
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WRITE_REG(timer_initstruct->perh->AR, (uint32_t)_arr);
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timer_initstruct->init.period = (uint32_t)_arr;
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2021-10-10 03:33:43 +08:00
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2019-03-11 17:39:53 +08:00
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/* update prescaler */
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2019-03-15 15:33:29 +08:00
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WRITE_REG(timer_initstruct->perh->PRES, --timer_initstruct->init.prescaler);
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2021-10-10 03:33:43 +08:00
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2019-03-15 15:33:29 +08:00
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pwm_set_duty(timer_initstruct, pwm_channel, cfg->pulse);
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2021-10-10 03:33:43 +08:00
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2019-03-11 17:39:53 +08:00
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break;
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case PWM_CMD_GET:
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2019-11-04 10:05:14 +08:00
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cfg->pulse = ald_timer_read_capture_value(timer_initstruct, pwm_channel) * 100 /
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2019-03-15 15:33:29 +08:00
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READ_REG(timer_initstruct->perh->AR);
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2019-03-11 17:39:53 +08:00
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break;
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default:
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break;
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}
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return ret;
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}
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const static struct rt_pwm_ops es32f0_pwm_ops =
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{
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es32f0_pwm_control
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};
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int rt_hw_pwm_init(void)
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{
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rt_err_t ret = RT_EOK;
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gpio_init_t gpio_initstructure;
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gpio_initstructure.mode = GPIO_MODE_OUTPUT;
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gpio_initstructure.odos = GPIO_PUSH_PULL;
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gpio_initstructure.pupd = GPIO_PUSH_UP;
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gpio_initstructure.odrv = GPIO_OUT_DRIVE_NORMAL;
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gpio_initstructure.flt = GPIO_FILTER_DISABLE;
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gpio_initstructure.type = GPIO_TYPE_TTL;
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2021-06-04 18:58:22 +08:00
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#ifdef BSP_USING_AD16C4T0_PWM /* 4 channels */
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static struct rt_device_pwm ad16c4t0_pwm_dev;
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static timer_handle_t ad16c4t0_timer_initstruct;
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2019-03-11 17:39:53 +08:00
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2021-06-04 18:58:22 +08:00
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ad16c4t0_timer_initstruct.perh = AD16C4T0;
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ald_timer_pwm_init(&ad16c4t0_timer_initstruct);
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2019-03-11 17:39:53 +08:00
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/* gpio initialization */
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2021-06-04 18:58:22 +08:00
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2021-10-10 03:33:43 +08:00
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#if defined(ES_AD16C4T0_CH1_GPIO_FUNC)&&defined(ES_AD16C4T0_CH1_GPIO_PORT)&&defined(ES_AD16C4T0_CH1_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_AD16C4T0_CH1_GPIO_FUNC;
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ald_gpio_init(ES_AD16C4T0_CH1_GPIO_PORT, ES_AD16C4T0_CH1_GPIO_PIN, &gpio_initstructure);
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2021-10-10 03:33:43 +08:00
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#endif
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#if defined(ES_AD16C4T0_CH2_GPIO_FUNC)&&defined(ES_AD16C4T0_CH2_GPIO_PORT)&&defined(ES_AD16C4T0_CH2_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_AD16C4T0_CH2_GPIO_FUNC;
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ald_gpio_init(ES_AD16C4T0_CH2_GPIO_PORT, ES_AD16C4T0_CH2_GPIO_PIN, &gpio_initstructure);
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2021-10-10 03:33:43 +08:00
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#endif
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2021-06-04 18:58:22 +08:00
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2021-10-10 03:33:43 +08:00
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#if defined(ES_AD16C4T0_CH3_GPIO_FUNC)&&defined(ES_AD16C4T0_CH3_GPIO_PORT)&&defined(ES_AD16C4T0_CH3_GPIO_FUNC)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_AD16C4T0_CH3_GPIO_FUNC;
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ald_gpio_init(ES_AD16C4T0_CH3_GPIO_PORT, ES_AD16C4T0_CH3_GPIO_PIN, &gpio_initstructure);
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2021-10-10 03:33:43 +08:00
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#endif
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2021-06-04 18:58:22 +08:00
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2021-10-10 03:33:43 +08:00
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#if defined(ES_AD16C4T0_CH4_GPIO_FUNC)&&defined(ES_AD16C4T0_CH4_GPIO_PORT)&&defined(ES_AD16C4T0_CH4_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_AD16C4T0_CH4_GPIO_FUNC;
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2021-10-10 03:33:43 +08:00
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ald_gpio_init(ES_AD16C4T0_CH4_GPIO_PORT, ES_AD16C4T0_CH4_GPIO_PIN, &gpio_initstructure);
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#endif
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2021-06-04 18:58:22 +08:00
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ret = rt_device_pwm_register(&ad16c4t0_pwm_dev, ES_DEVICE_NAME_AD16C4T0_PWM, &es32f0_pwm_ops,
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&ad16c4t0_timer_initstruct);
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2019-03-11 17:39:53 +08:00
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#endif
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2021-06-04 18:58:22 +08:00
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#ifdef BSP_USING_GP16C4T0_PWM /* 4 channels */
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static struct rt_device_pwm gp16c4t0_pwm_dev;
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static timer_handle_t gp16c4t0_timer_initstruct;
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2019-03-11 17:39:53 +08:00
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2021-06-04 18:58:22 +08:00
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gp16c4t0_timer_initstruct.perh = GP16C4T0;
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ald_timer_pwm_init(&gp16c4t0_timer_initstruct);
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2019-03-11 17:39:53 +08:00
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/* gpio initialization */
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2021-10-10 03:33:43 +08:00
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#if defined(ES_GP16C4T0_CH1_GPIO_FUNC)&&defined(ES_GP16C4T0_CH1_GPIO_PORT)&&defined(ES_GP16C4T0_CH1_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_GP16C4T0_CH1_GPIO_FUNC;
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2021-10-10 03:33:43 +08:00
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ald_gpio_init(ES_GP16C4T0_CH1_GPIO_PORT, ES_GP16C4T0_CH1_GPIO_PIN, &gpio_initstructure);
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#endif
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#if defined(ES_GP16C4T0_CH2_GPIO_FUNC)&&defined(ES_GP16C4T0_CH2_GPIO_PORT)&&defined(ES_GP16C4T0_CH2_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_GP16C4T0_CH2_GPIO_FUNC;
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2021-10-10 03:33:43 +08:00
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ald_gpio_init(ES_GP16C4T0_CH2_GPIO_PORT, ES_GP16C4T0_CH2_GPIO_PIN, &gpio_initstructure);
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#endif
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2021-06-04 18:58:22 +08:00
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2021-10-10 03:33:43 +08:00
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#if defined(ES_GP16C4T0_CH3_GPIO_FUNC)&&defined(ES_GP16C4T0_CH3_GPIO_PORT)&&defined(ES_GP16C4T0_CH3_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_GP16C4T0_CH3_GPIO_FUNC;
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ald_gpio_init(ES_GP16C4T0_CH3_GPIO_PORT, ES_GP16C4T0_CH3_GPIO_PIN, &gpio_initstructure);
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2021-10-10 03:33:43 +08:00
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#endif
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2021-06-04 18:58:22 +08:00
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#if defined(ES_GP16C4T0_CH4_GPIO_FUNC)&&defined(ES_GP16C4T0_CH4_GPIO_PORT)&&defined(ES_GP16C4T0_CH4_GPIO_PIN)
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gpio_initstructure.func = ES_GP16C4T0_CH4_GPIO_FUNC;
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2021-10-10 03:33:43 +08:00
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ald_gpio_init(ES_GP16C4T0_CH4_GPIO_PORT, ES_GP16C4T0_CH4_GPIO_PIN, &gpio_initstructure);
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#endif
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2021-06-04 18:58:22 +08:00
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ret = rt_device_pwm_register(&gp16c4t0_pwm_dev, ES_DEVICE_NAME_GP16C4T0_PWM, &es32f0_pwm_ops,
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&gp16c4t0_timer_initstruct);
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2019-03-11 17:39:53 +08:00
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#endif
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2021-06-04 18:58:22 +08:00
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#ifdef BSP_USING_GP16C2T0_PWM /* 2 channels */
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static struct rt_device_pwm gp16c2t0_pwm_dev;
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static timer_handle_t gp16c2t0_timer_initstruct;
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2019-03-11 17:39:53 +08:00
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2021-06-04 18:58:22 +08:00
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gp16c2t0_timer_initstruct.perh = GP16C2T0;
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ald_timer_pwm_init(&gp16c2t0_timer_initstruct);
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2019-03-11 17:39:53 +08:00
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2021-06-04 18:58:22 +08:00
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/* gpio initialization */
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2021-10-10 03:33:43 +08:00
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#if defined(ES_GP16C2T0_CH1_GPIO_FUNC)&&defined(ES_GP16C2T0_CH1_GPIO_PORT)&&defined(ES_GP16C2T0_CH1_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_GP16C2T0_CH1_GPIO_FUNC;
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2021-10-10 03:33:43 +08:00
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ald_gpio_init(ES_GP16C2T0_CH1_GPIO_PORT, ES_GP16C2T0_CH1_GPIO_PIN, &gpio_initstructure);
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#endif
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#if defined(ES_GP16C2T0_CH2_GPIO_FUNC)&&defined(ES_GP16C2T0_CH2_GPIO_PORT)&&defined(ES_GP16C2T0_CH2_GPIO_PIN)
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2021-06-04 18:58:22 +08:00
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gpio_initstructure.func = ES_GP16C2T0_CH2_GPIO_FUNC;
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2021-10-10 03:33:43 +08:00
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ald_gpio_init(ES_GP16C2T0_CH2_GPIO_PORT, ES_GP16C2T0_CH2_GPIO_PIN, &gpio_initstructure);
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#endif
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2021-06-04 18:58:22 +08:00
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ret = rt_device_pwm_register(&gp16c2t0_pwm_dev, ES_DEVICE_NAME_GP16C2T0_PWM, &es32f0_pwm_ops,
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&gp16c2t0_timer_initstruct);
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2019-03-11 17:39:53 +08:00
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#endif
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2021-06-04 18:58:22 +08:00
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#ifdef BSP_USING_GP16C2T1_PWM /* 2 channels */
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static struct rt_device_pwm gp16c2t1_pwm_dev;
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static timer_handle_t gp16c2t1_timer_initstruct;
|
2019-03-11 17:39:53 +08:00
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|
2021-06-04 18:58:22 +08:00
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gp16c2t1_timer_initstruct.perh = GP16C2T1;
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ald_timer_pwm_init(&gp16c2t1_timer_initstruct);
|
2019-03-11 17:39:53 +08:00
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2021-06-04 18:58:22 +08:00
|
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/* gpio initialization */
|
2021-10-10 03:33:43 +08:00
|
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|
#if defined(ES_GP16C2T1_CH1_GPIO_FUNC)&&defined(ES_GP16C2T1_CH1_GPIO_PORT)&&defined(ES_GP16C2T1_CH1_GPIO_PIN)
|
2021-06-04 18:58:22 +08:00
|
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gpio_initstructure.func = ES_GP16C2T1_CH1_GPIO_FUNC;
|
2021-10-10 03:33:43 +08:00
|
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|
ald_gpio_init(ES_GP16C2T1_CH1_GPIO_PORT, ES_GP16C2T1_CH1_GPIO_PIN, &gpio_initstructure);
|
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|
#endif
|
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|
|
#if defined(ES_GP16C2T1_CH2_GPIO_FUNC)&&defined(ES_GP16C2T1_CH2_GPIO_PORT)&&defined(ES_GP16C2T1_CH2_GPIO_PIN)
|
2021-06-04 18:58:22 +08:00
|
|
|
|
gpio_initstructure.func = ES_GP16C2T1_CH2_GPIO_FUNC;
|
2021-10-10 03:33:43 +08:00
|
|
|
|
ald_gpio_init(ES_GP16C2T1_CH2_GPIO_PORT, ES_GP16C2T1_CH2_GPIO_PIN, &gpio_initstructure);
|
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|
|
|
#endif
|
2021-06-04 18:58:22 +08:00
|
|
|
|
|
|
|
|
|
ret = rt_device_pwm_register(&gp16c2t1_pwm_dev, ES_DEVICE_NAME_GP16C2T1_PWM, &es32f0_pwm_ops,
|
|
|
|
|
&gp16c2t1_timer_initstruct);
|
2019-03-11 17:39:53 +08:00
|
|
|
|
#endif
|
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|
2021-06-04 18:58:22 +08:00
|
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|
2019-03-11 17:39:53 +08:00
|
|
|
|
return ret;
|
|
|
|
|
}
|
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|
|
|
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
|
2021-06-04 18:58:22 +08:00
|
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|
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|
|
#endif
|