2022-11-10 22:22:48 +08:00
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/*
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2023-05-11 10:25:21 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2022-11-10 22:22:48 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Email: opensource_embedded@phytium.com.cn
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-26 huanghe first commit
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*
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*/
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#include "rtconfig.h"
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#include <rtthread.h>
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#include "fcpu_info.h"
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#include "fparameters.h"
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/**
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* @name: GetCpuMaskToAffval
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* @msg: Convert information in cpu_mask to cluster_ID and target_list
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* @param {u32} *cpu_mask is each bit of cpu_mask represents a selected CPU, for example, 0x3 represents core0 and CORE1 .
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* @param {u32} *cluster_id is information about the cluster in which core resides ,format is
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* |--------[bit31-24]-------[bit23-16]-------------[bit15-8]-----------[bit7-0]
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* |--------Affinity level3-----Affinity level2-----Affinity level1-----Affinity level0
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* @param {u32} *target_list is core mask in cluster
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* @return {u32} 0 indicates that the conversion was not successful , 1 indicates that the conversion was successful
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*/
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u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
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{
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if (*cpu_mask == 0)
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{
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return 0;
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}
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*target_list = 0;
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*cluster_id = 0;
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if (*cpu_mask & 0x3)
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{
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if ((*cpu_mask & 0x3) == 0x3)
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{
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*target_list = 3;
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}
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else if ((*cpu_mask & 0x1))
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{
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*target_list = 1;
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}
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else
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{
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*target_list = 2;
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}
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*cpu_mask &= ~0x3;
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}
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else if (*cpu_mask & 0xc)
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{
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*cluster_id = 0x100;
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if ((*cpu_mask & 0xc) == 0xc)
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{
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*target_list = 3;
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}
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else if ((*cpu_mask & 0x4))
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{
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*target_list = 1;
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}
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else
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{
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*target_list = 2;
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}
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*cpu_mask &= ~0xc;
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}
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else if (*cpu_mask & 0x30)
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{
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*cluster_id = 0x200;
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if ((*cpu_mask & 0x30) == 0x30)
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{
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*target_list = 3;
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}
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else if ((*cpu_mask & 0x10))
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{
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*target_list = 1;
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}
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else
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{
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*target_list = 2;
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}
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*cpu_mask &= ~0x30;
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}
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else if (*cpu_mask & 0xc0)
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{
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*cluster_id = 0x300;
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if ((*cpu_mask & 0xc0) == 0xc0)
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{
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*target_list = 3;
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}
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else if ((*cpu_mask & 0x40))
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{
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*target_list = 1;
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}
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else
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{
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*target_list = 2;
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}
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*cpu_mask &= ~0xc0;
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}
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else
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{
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*cpu_mask = 0;
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return 0;
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}
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return 1;
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2023-05-11 10:25:21 +08:00
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}
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