2013-01-08 21:05:02 +08:00
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/*
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* File : cpuport.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-02-23 Bernard the first version
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* 2012-09-25 lgnq save texit address in to thread stack
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*/
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#include <rtthread.h>
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extern volatile rt_uint8_t rt_interrupt_nest;
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/* switch flag on interrupt and thread pointer to save switch record */
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rt_uint32_t rt_interrupt_from_thread;
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rt_uint32_t rt_interrupt_to_thread;
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rt_uint8_t rt_thread_switch_interrupt_flag;
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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/**
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* This function will initialize thread stack
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*
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* @param tentry the entry of thread
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* @param parameter the parameter of entry
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* @param stack_addr the beginning stack address
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* @param texit the function will be called when thread exit
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*
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* @return stack address
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*/
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rt_uint8_t *rt_hw_stack_init(void *tentry,
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void *parameter,
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rt_uint8_t *stack_addr,
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void *texit)
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{
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rt_uint16_t *pstk16;
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rt_uint16_t flag;
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flag = 0x0040;
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pstk16 = (rt_uint16_t *)stack_addr;
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*pstk16-- = (rt_uint32_t)texit >> 16L;
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*pstk16-- = (rt_uint32_t)texit & 0x0000FFFFL;
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/* Simulate ISR entry */
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*pstk16-- = (flag&0x00FF) | /* The lowest byte of the FLAG register */
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(((rt_uint32_t)tentry>>8)&0x00000F00) | /* The highest nibble of the PC register */
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((flag<<4)&0xF000); /* The highest nibble of the FLAG register */
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*pstk16-- = (((rt_uint32_t)tentry)&0x0000FFFF); /* The lowest bytes of the PC register */
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/* Save registers onto stack frame */
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*pstk16-- = (rt_uint16_t)0xFBFB; /* FB register */
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*pstk16-- = (rt_uint16_t)0x3B3B; /* SB register */
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*pstk16-- = (rt_uint16_t)0xA1A1; /* A1 register */
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*pstk16-- = (rt_uint16_t)0xA0A0; /* A0 register */
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*pstk16-- = (rt_uint16_t)0x3333; /* R3 register */
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*pstk16-- = (rt_uint32_t)parameter >> 16L; /* Pass argument in R2 register */
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*pstk16-- = (rt_uint32_t)parameter & 0x0000FFFFL; /* Pass argument in R1 register */
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*pstk16 = (rt_uint16_t)0x0000; /* R0 register */
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/* return task's current stack address */
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return (rt_uint8_t *)pstk16;
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}
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void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to)
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{
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rt_interrupt_from_thread = from;
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rt_interrupt_to_thread = to;
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asm("INT #0");
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}
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void rt_hw_context_switch_interrupt(rt_uint32_t from, rt_uint32_t to)
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{
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if (rt_thread_switch_interrupt_flag != 1)
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{
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rt_thread_switch_interrupt_flag = 1;
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rt_interrupt_from_thread = from;
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}
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rt_interrupt_to_thread = to;
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}
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#if defined(__GNUC__)
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rt_base_t rt_hw_interrupt_disable(void)
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{
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register rt_uint16_t temp;
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asm("STC FLG, %0":"=r" (temp));
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asm("FCLR I");
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return (rt_base_t)temp;
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}
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void rt_hw_interrupt_enable(rt_base_t level)
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{
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register rt_uint16_t temp;
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temp = level & 0xffff;
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asm("LDC %0, FLG": :"r" (temp));
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}
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2021-03-27 17:51:56 +08:00
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#endif
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