2019-07-24 17:03:26 +08:00
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/*
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2021-03-12 00:03:36 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2019-07-24 17:03:26 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-23 tyustli first version
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*
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*/
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2021-09-11 18:09:22 +08:00
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#include <stddef.h>
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2019-07-24 17:03:26 +08:00
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#ifdef RT_USING_SERIAL
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#include <drv_usart.h>
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#endif
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/* System Tick Configuration */
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static void systick_config(rt_uint32_t ticks) {
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/* set value */
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*(rt_uint64_t *) (TMR_CTRL_ADDR + TMR_MTIMECMP) = ticks;
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/* enable interrupt */
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eclic_irq_enable(CLIC_INT_TMR, 0, 0);
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/* clear value */
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*(rt_uint64_t *) (TMR_CTRL_ADDR + TMR_MTIME) = 0;
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}
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/* This is the timer interrupt service routine. */
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void eclic_mtip_handler(void) {
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/* clear value */
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*(rt_uint64_t *) (TMR_CTRL_ADDR + TMR_MTIME) = 0;
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/* enter interrupt */
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rt_interrupt_enter();
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/* tick increase */
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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2019-08-21 22:26:25 +08:00
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/* fixed misaligned bug for qemu */
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void *__wrap_memset(void *s, int c, size_t n)
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{
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return rt_memset(s, c, n);
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}
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2019-07-24 17:03:26 +08:00
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void rt_hw_board_init(void) {
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2019-10-21 17:12:00 +08:00
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extern void riscv_clock_init(void);
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riscv_clock_init();
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2019-07-24 17:03:26 +08:00
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systick_config(TMR_FREQ / RT_TICK_PER_SECOND);
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#ifdef RT_USING_HEAP
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rt_system_heap_init((void *) HEAP_BEGIN, (void *) HEAP_END);
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#endif
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/* USART driver initialization is open by default */
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#ifdef RT_USING_SERIAL
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rt_hw_usart_init();
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#endif
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/* Set the shell console output device */
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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/* Board underlying hardware initialization */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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}
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/******************** end of file *******************/
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