2012-11-22 16:43:40 +08:00
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/*
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2023-04-18 10:26:23 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2012-11-22 16:43:40 +08:00
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*
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2018-10-14 19:37:18 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2012-11-22 16:43:40 +08:00
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*
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* Change Logs:
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* Date Author Notes
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* 2012-04-25 weety first version
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2014-08-03 14:29:46 +08:00
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* 2014-08-03 bernard fix some compiling warning
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2021-04-20 00:26:28 +08:00
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* 2021-04-20 RiceChen added support for bus clock control
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2012-11-22 16:43:40 +08:00
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*/
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#include <rtdevice.h>
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2019-11-26 07:41:43 +08:00
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#define DBG_TAG "I2C"
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#ifdef RT_I2C_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_INFO
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#endif
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#include <rtdbg.h>
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t i2c_bus_device_read(rt_device_t dev,
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2012-11-22 16:43:40 +08:00
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rt_off_t pos,
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void *buffer,
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rt_size_t count)
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{
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rt_uint16_t addr;
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rt_uint16_t flags;
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struct rt_i2c_bus_device *bus = (struct rt_i2c_bus_device *)dev->user_data;
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RT_ASSERT(bus != RT_NULL);
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RT_ASSERT(buffer != RT_NULL);
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2019-11-26 07:41:43 +08:00
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LOG_D("I2C bus dev [%s] reading %u bytes.", dev->parent.name, count);
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2012-11-22 16:43:40 +08:00
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addr = pos & 0xffff;
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flags = (pos >> 16) & 0xffff;
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2019-06-18 20:09:19 +08:00
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return rt_i2c_master_recv(bus, addr, flags, (rt_uint8_t *)buffer, count);
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2012-11-22 16:43:40 +08:00
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t i2c_bus_device_write(rt_device_t dev,
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2012-11-22 16:43:40 +08:00
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rt_off_t pos,
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const void *buffer,
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rt_size_t count)
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{
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rt_uint16_t addr;
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rt_uint16_t flags;
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struct rt_i2c_bus_device *bus = (struct rt_i2c_bus_device *)dev->user_data;
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RT_ASSERT(bus != RT_NULL);
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RT_ASSERT(buffer != RT_NULL);
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2019-11-26 07:41:43 +08:00
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LOG_D("I2C bus dev [%s] writing %u bytes.", dev->parent.name, count);
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2012-11-22 16:43:40 +08:00
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addr = pos & 0xffff;
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flags = (pos >> 16) & 0xffff;
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2019-06-18 20:09:19 +08:00
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return rt_i2c_master_send(bus, addr, flags, (const rt_uint8_t *)buffer, count);
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2012-11-22 16:43:40 +08:00
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}
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static rt_err_t i2c_bus_device_control(rt_device_t dev,
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2017-10-15 22:56:46 +08:00
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int cmd,
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2012-11-22 16:43:40 +08:00
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void *args)
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{
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rt_err_t ret;
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struct rt_i2c_priv_data *priv_data;
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struct rt_i2c_bus_device *bus = (struct rt_i2c_bus_device *)dev->user_data;
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2021-04-20 00:26:28 +08:00
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rt_uint32_t bus_clock;
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2012-11-22 16:43:40 +08:00
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RT_ASSERT(bus != RT_NULL);
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switch (cmd)
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{
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/* set 10-bit addr mode */
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case RT_I2C_DEV_CTRL_10BIT:
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bus->flags |= RT_I2C_ADDR_10BIT;
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break;
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case RT_I2C_DEV_CTRL_TIMEOUT:
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bus->timeout = *(rt_uint32_t *)args;
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break;
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case RT_I2C_DEV_CTRL_RW:
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priv_data = (struct rt_i2c_priv_data *)args;
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ret = rt_i2c_transfer(bus, priv_data->msgs, priv_data->number);
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if (ret < 0)
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{
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return -RT_EIO;
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}
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break;
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2021-04-20 00:26:28 +08:00
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case RT_I2C_DEV_CTRL_CLK:
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bus_clock = *(rt_uint32_t *)args;
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ret = rt_i2c_control(bus, cmd, bus_clock);
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if (ret < 0)
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{
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return -RT_EIO;
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}
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break;
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2012-11-22 16:43:40 +08:00
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default:
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break;
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}
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return RT_EOK;
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}
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2018-06-10 17:59:17 +08:00
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#ifdef RT_USING_DEVICE_OPS
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2021-03-08 18:19:04 +08:00
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const static struct rt_device_ops i2c_ops =
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2018-06-10 17:59:17 +08:00
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{
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2021-03-08 18:19:04 +08:00
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RT_NULL,
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2018-06-10 17:59:17 +08:00
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RT_NULL,
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RT_NULL,
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i2c_bus_device_read,
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i2c_bus_device_write,
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i2c_bus_device_control
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};
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#endif
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2012-11-22 16:43:40 +08:00
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rt_err_t rt_i2c_bus_device_device_init(struct rt_i2c_bus_device *bus,
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const char *name)
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{
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struct rt_device *device;
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RT_ASSERT(bus != RT_NULL);
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device = &bus->parent;
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device->user_data = bus;
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/* set device type */
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device->type = RT_Device_Class_I2CBUS;
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/* initialize device interface */
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2018-06-10 17:59:17 +08:00
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#ifdef RT_USING_DEVICE_OPS
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device->ops = &i2c_ops;
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#else
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2014-08-03 14:29:46 +08:00
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device->init = RT_NULL;
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2012-11-22 16:43:40 +08:00
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device->open = RT_NULL;
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device->close = RT_NULL;
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device->read = i2c_bus_device_read;
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device->write = i2c_bus_device_write;
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device->control = i2c_bus_device_control;
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2018-06-10 17:59:17 +08:00
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#endif
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2012-11-22 16:43:40 +08:00
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/* register to device manager */
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rt_device_register(device, name, RT_DEVICE_FLAG_RDWR);
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return RT_EOK;
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}
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