2019-06-28 14:02:20 +08:00
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/*
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2023-02-11 08:13:40 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2019-06-28 14:02:20 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-06-27 misonyo the first version.
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2022-09-01 09:19:02 +08:00
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* 2022-09-01 xjy198903 add support for imxrt1170
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2019-06-28 14:02:20 +08:00
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*/
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#include <rtthread.h>
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#ifdef BSP_USING_CAN
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#include <rtdevice.h>
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#include "drv_can.h"
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#include "fsl_common.h"
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#include "fsl_iomuxc.h"
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#include "fsl_flexcan.h"
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#define LOG_TAG "drv.can"
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#include <drv_log.h>
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#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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#endif
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#define RX_MB_COUNT 32
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static flexcan_frame_t frame[RX_MB_COUNT]; /* one frame buffer per RX MB */
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static rt_uint32_t filter_mask = 0;
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2022-09-07 09:20:04 +08:00
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#ifdef SOC_IMXRT1170_SERIES
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#define USE_IMPROVED_TIMING_CONFIG (1U)
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#endif
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2019-06-28 14:02:20 +08:00
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enum
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{
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#ifdef BSP_USING_CAN1
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CAN1_INDEX,
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#endif
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#ifdef BSP_USING_CAN2
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CAN2_INDEX,
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#endif
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2022-09-01 09:19:02 +08:00
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#ifdef BSP_USING_CAN3
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CAN3_INDEX,
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#endif
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2019-06-28 14:02:20 +08:00
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};
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struct imxrt_can
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{
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char *name;
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CAN_Type *base;
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IRQn_Type irqn;
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flexcan_handle_t handle;
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struct rt_can_device can_dev;
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};
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struct imxrt_can flexcans[] =
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{
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#ifdef BSP_USING_CAN1
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{
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.name = "can1",
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.base = CAN1,
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.irqn = CAN1_IRQn,
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},
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#endif
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#ifdef BSP_USING_CAN2
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{
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.name = "can2",
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.base = CAN2,
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.irqn = CAN2_IRQn,
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},
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#endif
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2022-09-01 09:19:02 +08:00
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#ifdef BSP_USING_CAN3
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{
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.name = "can3",
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.base = CAN3,
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.irqn = CAN3_IRQn,
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},
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#endif
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2019-06-28 14:02:20 +08:00
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};
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2022-09-01 09:19:02 +08:00
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uint32_t GetCanSrcFreq(CAN_Type *can_base)
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2019-06-28 14:02:20 +08:00
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{
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uint32_t freq;
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2022-09-01 09:19:02 +08:00
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#ifdef SOC_IMXRT1170_SERIES
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uint32_t base = (uint32_t) can_base;
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switch (base)
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{
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case CAN1_BASE:
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freq = (CLOCK_GetRootClockFreq(kCLOCK_Root_Can1) / 100000U) * 100000U;
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break;
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case CAN2_BASE:
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freq = (CLOCK_GetRootClockFreq(kCLOCK_Root_Can2) / 100000U) * 100000U;
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break;
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case CAN3_BASE:
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freq = (CLOCK_GetRootClockFreq(kCLOCK_Root_Can3) / 100000U) * 100000U;
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break;
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default:
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freq = (CLOCK_GetRootClockFreq(kCLOCK_Root_Can3) / 100000U) * 100000U;
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break;
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}
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#else
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2019-06-28 14:02:20 +08:00
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freq = (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 6) / (CLOCK_GetDiv(kCLOCK_CanDiv) + 1U);
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2022-09-01 09:19:02 +08:00
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#endif
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2019-06-28 14:02:20 +08:00
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return freq;
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}
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2022-09-07 09:20:04 +08:00
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#ifdef SOC_IMXRT1170_SERIES
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static void flexcan_callback(CAN_Type *base, flexcan_handle_t *handle, status_t status, uint64_t result, void *userData)
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#else
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2019-06-28 14:02:20 +08:00
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static void flexcan_callback(CAN_Type *base, flexcan_handle_t *handle, status_t status, uint32_t result, void *userData)
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2022-09-07 09:20:04 +08:00
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#endif
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2019-06-28 14:02:20 +08:00
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{
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struct imxrt_can *can;
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flexcan_mb_transfer_t rxXfer;
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can = (struct imxrt_can *)userData;
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switch (status)
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{
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case kStatus_FLEXCAN_RxIdle:
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rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_RX_IND | result << 8);
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rxXfer.frame = &frame[result - 1];
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rxXfer.mbIdx = result;
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FLEXCAN_TransferReceiveNonBlocking(can->base, &can->handle, &rxXfer);
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break;
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case kStatus_FLEXCAN_TxIdle:
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rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_TX_DONE | (63 - result) << 8);
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break;
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case kStatus_FLEXCAN_WakeUp:
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case kStatus_FLEXCAN_ErrorStatus:
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if ((result >= 47) && (result <= 63))
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{
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rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_TX_FAIL | (63 - result) << 8);
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}
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break;
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case kStatus_FLEXCAN_TxSwitchToRx:
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break;
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default:
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break;
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}
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}
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static rt_err_t can_cfg(struct rt_can_device *can_dev, struct can_configure *cfg)
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{
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struct imxrt_can *can;
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flexcan_config_t config;
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rt_uint32_t res = RT_EOK;
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flexcan_rx_mb_config_t mbConfig;
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flexcan_mb_transfer_t rxXfer;
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rt_uint8_t i, mailbox;
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RT_ASSERT(can_dev != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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can = (struct imxrt_can *)can_dev->parent.user_data;
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RT_ASSERT(can != RT_NULL);
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FLEXCAN_GetDefaultConfig(&config);
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config.baudRate = cfg->baud_rate;
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config.maxMbNum = 64; /* all series have 64 MB */
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config.enableIndividMask = true; /* one filter per MB */
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switch (cfg->mode)
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{
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case RT_CAN_MODE_NORMAL:
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/* default mode */
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break;
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2022-08-14 10:59:28 +08:00
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case RT_CAN_MODE_LISTEN:
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2019-06-28 14:02:20 +08:00
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break;
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case RT_CAN_MODE_LOOPBACK:
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config.enableLoopBack = true;
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break;
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2022-08-14 10:59:28 +08:00
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case RT_CAN_MODE_LOOPBACKANLISTEN:
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2019-06-28 14:02:20 +08:00
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break;
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}
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2022-09-07 09:20:04 +08:00
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#ifdef SOC_IMXRT1170_SERIES
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flexcan_timing_config_t timing_config;
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2022-11-18 01:07:20 +08:00
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rt_memset(&timing_config, 0, sizeof(flexcan_timing_config_t));
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2022-09-07 09:20:04 +08:00
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if(FLEXCAN_CalculateImprovedTimingValues(can->base, config.baudRate, GetCanSrcFreq(can->base), &timing_config))
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{
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/* Update the improved timing configuration*/
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2022-11-18 01:07:20 +08:00
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rt_memcpy(&(config.timingConfig), &timing_config, sizeof(flexcan_timing_config_t));
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2022-09-07 09:20:04 +08:00
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}
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else
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{
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LOG_E("No found Improved Timing Configuration. Just used default configuration\n");
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}
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#endif
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2022-09-01 09:19:02 +08:00
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FLEXCAN_Init(can->base, &config, GetCanSrcFreq(can->base));
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2019-06-28 14:02:20 +08:00
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FLEXCAN_TransferCreateHandle(can->base, &can->handle, flexcan_callback, can);
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/* init RX_MB_COUNT RX MB to default status */
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mbConfig.format = kFLEXCAN_FrameFormatStandard; /* standard ID */
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mbConfig.type = kFLEXCAN_FrameTypeData; /* data frame */
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mbConfig.id = FLEXCAN_ID_STD(0); /* default ID is 0 */
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for (i = 0; i < RX_MB_COUNT; i++)
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{
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/* the used MB index from 1 to RX_MB_COUNT */
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mailbox = i + 1;
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/* all ID bit in the filter is "don't care" */
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FLEXCAN_SetRxIndividualMask(can->base, mailbox, FLEXCAN_RX_MB_STD_MASK(0, 0, 0));
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FLEXCAN_SetRxMbConfig(can->base, mailbox, &mbConfig, true);
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/* one frame buffer per MB */
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rxXfer.frame = &frame[i];
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rxXfer.mbIdx = mailbox;
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FLEXCAN_TransferReceiveNonBlocking(can->base, &can->handle, &rxXfer);
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}
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return res;
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}
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static rt_err_t can_control(struct rt_can_device *can_dev, int cmd, void *arg)
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{
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struct imxrt_can *can;
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rt_uint32_t argval, mask;
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rt_uint32_t res = RT_EOK;
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flexcan_rx_mb_config_t mbConfig;
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struct rt_can_filter_config *cfg;
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struct rt_can_filter_item *item;
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rt_uint8_t i, count, index;
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RT_ASSERT(can_dev != RT_NULL);
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can = (struct imxrt_can *)can_dev->parent.user_data;
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RT_ASSERT(can != RT_NULL);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_SET_INT:
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argval = (rt_uint32_t) arg;
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if (argval == RT_DEVICE_FLAG_INT_RX)
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{
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mask = kFLEXCAN_RxWarningInterruptEnable;
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}
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else if (argval == RT_DEVICE_FLAG_INT_TX)
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{
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mask = kFLEXCAN_TxWarningInterruptEnable;
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}
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else if (argval == RT_DEVICE_CAN_INT_ERR)
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{
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mask = kFLEXCAN_ErrorInterruptEnable;
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}
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FLEXCAN_EnableInterrupts(can->base, mask);
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NVIC_SetPriority(can->irqn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
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EnableIRQ(can->irqn);
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break;
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case RT_DEVICE_CTRL_CLR_INT:
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/* each CAN device have one IRQ number. */
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DisableIRQ(can->irqn);
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break;
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case RT_CAN_CMD_SET_FILTER:
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cfg = (struct rt_can_filter_config *)arg;
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item = cfg->items;
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count = cfg->count;
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if (filter_mask == 0xffffffff)
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{
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LOG_E("%s filter is full!\n", can->name);
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2023-03-17 12:12:16 +08:00
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res = -RT_ERROR;
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2019-06-28 14:02:20 +08:00
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break;
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}
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else if (filter_mask == 0)
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{
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/* deinit all init RX MB */
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for (i = 0; i < RX_MB_COUNT; i++)
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{
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FLEXCAN_SetRxMbConfig(can->base, i + 1, RT_NULL, false);
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}
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}
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while (count)
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{
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if (item->ide)
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{
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mbConfig.format = kFLEXCAN_FrameFormatExtend;
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mbConfig.id = FLEXCAN_ID_EXT(item->id);
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mask = FLEXCAN_RX_MB_EXT_MASK(item->mask, 0, 0);
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}
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else
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{
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mbConfig.format = kFLEXCAN_FrameFormatStandard;
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mbConfig.id = FLEXCAN_ID_STD(item->id);
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mask = FLEXCAN_RX_MB_STD_MASK(item->mask, 0, 0);
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}
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if (item->rtr)
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{
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mbConfig.type = kFLEXCAN_FrameTypeRemote;
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}
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else
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{
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mbConfig.type = kFLEXCAN_FrameTypeData;
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}
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2022-11-22 10:45:51 +08:00
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/* user does not specify hdr index,set hdr_bank from RX MB 1 */
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if (item->hdr_bank == -1)
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2019-06-28 14:02:20 +08:00
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{
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for (i = 0; i < 32; i++)
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{
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if (!(filter_mask & (1 << i)))
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{
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index = i;
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break;
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}
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}
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}
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2022-11-22 10:45:51 +08:00
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else /* use user specified hdr_bank */
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2019-06-28 14:02:20 +08:00
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{
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2022-11-22 10:45:51 +08:00
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if (filter_mask & (1 << item->hdr_bank))
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2019-06-28 14:02:20 +08:00
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{
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2023-03-17 12:12:16 +08:00
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res = -RT_ERROR;
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2022-11-22 10:45:51 +08:00
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LOG_E("%s hdr%d filter already set!\n", can->name, item->hdr_bank);
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2019-06-28 14:02:20 +08:00
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break;
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}
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else
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{
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2022-11-22 10:45:51 +08:00
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index = item->hdr_bank;
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2019-06-28 14:02:20 +08:00
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}
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}
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/* RX MB index from 1 to 32,hdr index 0~31 map RX MB index 1~32. */
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FLEXCAN_SetRxIndividualMask(can->base, index + 1, mask);
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FLEXCAN_SetRxMbConfig(can->base, index + 1, &mbConfig, true);
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filter_mask |= 1 << index;
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item++;
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count--;
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}
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break;
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case RT_CAN_CMD_SET_BAUD:
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2023-03-17 12:12:16 +08:00
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res = -RT_ERROR;
|
2019-06-28 14:02:20 +08:00
|
|
|
break;
|
|
|
|
case RT_CAN_CMD_SET_MODE:
|
2023-03-17 12:12:16 +08:00
|
|
|
res = -RT_ERROR;
|
2019-06-28 14:02:20 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case RT_CAN_CMD_SET_PRIV:
|
2023-03-17 12:12:16 +08:00
|
|
|
res = -RT_ERROR;
|
2019-06-28 14:02:20 +08:00
|
|
|
break;
|
|
|
|
case RT_CAN_CMD_GET_STATUS:
|
|
|
|
FLEXCAN_GetBusErrCount(can->base, (rt_uint8_t *)(&can->can_dev.status.snderrcnt), (rt_uint8_t *)(&can->can_dev.status.rcverrcnt));
|
|
|
|
rt_memcpy(arg, &can->can_dev.status, sizeof(can->can_dev.status));
|
|
|
|
break;
|
|
|
|
default:
|
2023-03-17 12:12:16 +08:00
|
|
|
res = -RT_ERROR;
|
2019-06-28 14:02:20 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2023-03-17 12:12:16 +08:00
|
|
|
static rt_ssize_t can_send(struct rt_can_device *can_dev, const void *buf, rt_uint32_t boxno)
|
2019-06-28 14:02:20 +08:00
|
|
|
{
|
|
|
|
struct imxrt_can *can;
|
|
|
|
struct rt_can_msg *msg;
|
|
|
|
status_t ret;
|
|
|
|
flexcan_frame_t frame;
|
|
|
|
flexcan_mb_transfer_t txXfer;
|
|
|
|
rt_uint8_t sendMB;
|
|
|
|
|
|
|
|
RT_ASSERT(can_dev != RT_NULL);
|
|
|
|
RT_ASSERT(buf != RT_NULL);
|
|
|
|
|
|
|
|
can = (struct imxrt_can *)can_dev->parent.user_data;
|
|
|
|
msg = (struct rt_can_msg *) buf;
|
|
|
|
RT_ASSERT(can != RT_NULL);
|
|
|
|
RT_ASSERT(msg != RT_NULL);
|
|
|
|
|
|
|
|
/* use the last 16 MB to send msg */
|
|
|
|
sendMB = 63 - boxno;
|
|
|
|
FLEXCAN_SetTxMbConfig(can->base, sendMB, true);
|
|
|
|
|
|
|
|
if (RT_CAN_STDID == msg->ide)
|
|
|
|
{
|
|
|
|
frame.id = FLEXCAN_ID_STD(msg->id);
|
|
|
|
frame.format = kFLEXCAN_FrameFormatStandard;
|
|
|
|
}
|
|
|
|
else if (RT_CAN_EXTID == msg->ide)
|
|
|
|
{
|
|
|
|
frame.id = FLEXCAN_ID_EXT(msg->id);
|
|
|
|
frame.format = kFLEXCAN_FrameFormatExtend;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (RT_CAN_DTR == msg->rtr)
|
|
|
|
{
|
|
|
|
frame.type = kFLEXCAN_FrameTypeData;
|
|
|
|
}
|
|
|
|
else if (RT_CAN_RTR == msg->rtr)
|
|
|
|
{
|
|
|
|
frame.type = kFLEXCAN_FrameTypeRemote;
|
|
|
|
}
|
|
|
|
|
|
|
|
frame.length = msg->len;
|
|
|
|
frame.dataByte0 = msg->data[0];
|
|
|
|
frame.dataByte1 = msg->data[1];
|
|
|
|
frame.dataByte2 = msg->data[2];
|
|
|
|
frame.dataByte3 = msg->data[3];
|
|
|
|
frame.dataByte4 = msg->data[4];
|
|
|
|
frame.dataByte5 = msg->data[5];
|
|
|
|
frame.dataByte6 = msg->data[6];
|
|
|
|
frame.dataByte7 = msg->data[7];
|
|
|
|
|
|
|
|
txXfer.mbIdx = sendMB;
|
|
|
|
txXfer.frame = &frame;
|
|
|
|
|
|
|
|
ret = FLEXCAN_TransferSendNonBlocking(can->base, &can->handle, &txXfer);
|
|
|
|
switch (ret)
|
|
|
|
{
|
|
|
|
case kStatus_Success:
|
|
|
|
ret = RT_EOK;
|
|
|
|
break;
|
|
|
|
case kStatus_Fail:
|
2023-03-17 12:12:16 +08:00
|
|
|
ret = -RT_ERROR;
|
2019-06-28 14:02:20 +08:00
|
|
|
break;
|
|
|
|
case kStatus_FLEXCAN_TxBusy:
|
2023-03-17 12:12:16 +08:00
|
|
|
ret = -RT_EBUSY;
|
2019-06-28 14:02:20 +08:00
|
|
|
break;
|
|
|
|
}
|
2022-01-26 12:24:09 +08:00
|
|
|
|
2023-03-17 12:12:16 +08:00
|
|
|
return (rt_ssize_t)ret;
|
2019-06-28 14:02:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int can_recv(struct rt_can_device *can_dev, void *buf, rt_uint32_t boxno)
|
|
|
|
{
|
|
|
|
struct imxrt_can *can;
|
|
|
|
struct rt_can_msg *pmsg;
|
|
|
|
rt_uint8_t index;
|
|
|
|
|
|
|
|
RT_ASSERT(can_dev != RT_NULL);
|
|
|
|
|
|
|
|
can = (struct imxrt_can *)can_dev->parent.user_data;
|
|
|
|
pmsg = (struct rt_can_msg *) buf;
|
|
|
|
RT_ASSERT(can != RT_NULL);
|
|
|
|
|
|
|
|
index = boxno - 1;
|
|
|
|
|
|
|
|
if (frame[index].format == kFLEXCAN_FrameFormatStandard)
|
|
|
|
{
|
|
|
|
pmsg->ide = RT_CAN_STDID;
|
|
|
|
pmsg->id = frame[index].id >> CAN_ID_STD_SHIFT;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
pmsg->ide = RT_CAN_EXTID;
|
|
|
|
pmsg->id = frame[index].id >> CAN_ID_EXT_SHIFT;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (frame[index].type == kFLEXCAN_FrameTypeData)
|
|
|
|
{
|
|
|
|
pmsg->rtr = RT_CAN_DTR;
|
|
|
|
}
|
|
|
|
else if (frame[index].type == kFLEXCAN_FrameTypeRemote)
|
|
|
|
{
|
|
|
|
pmsg->rtr = RT_CAN_RTR;
|
|
|
|
}
|
2022-11-22 10:45:51 +08:00
|
|
|
pmsg->hdr_index = index; /* one hdr filter per MB */
|
2019-06-28 14:02:20 +08:00
|
|
|
pmsg->len = frame[index].length;
|
|
|
|
pmsg->data[0] = frame[index].dataByte0;
|
|
|
|
pmsg->data[1] = frame[index].dataByte1;
|
|
|
|
pmsg->data[2] = frame[index].dataByte2;
|
|
|
|
pmsg->data[3] = frame[index].dataByte3;
|
|
|
|
pmsg->data[4] = frame[index].dataByte4;
|
|
|
|
pmsg->data[5] = frame[index].dataByte5;
|
|
|
|
pmsg->data[6] = frame[index].dataByte6;
|
|
|
|
pmsg->data[7] = frame[index].dataByte7;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct rt_can_ops imxrt_can_ops =
|
|
|
|
{
|
|
|
|
.configure = can_cfg,
|
|
|
|
.control = can_control,
|
|
|
|
.sendmsg = can_send,
|
|
|
|
.recvmsg = can_recv,
|
|
|
|
};
|
|
|
|
|
|
|
|
int rt_hw_can_init(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
rt_err_t ret = RT_EOK;
|
|
|
|
struct can_configure config = CANDEFAULTCONFIG;
|
|
|
|
|
|
|
|
config.privmode = 0;
|
|
|
|
config.ticks = 50;
|
|
|
|
config.sndboxnumber = 16; /* send Mailbox count */
|
|
|
|
config.msgboxsz = RX_MB_COUNT; /* RX msg buffer count */
|
|
|
|
#ifdef RT_CAN_USING_HDR
|
|
|
|
config.maxhdr = RX_MB_COUNT; /* filter count,one filter per MB */
|
|
|
|
#endif
|
|
|
|
|
|
|
|
for (i = 0; i < sizeof(flexcans) / sizeof(flexcans[0]); i++)
|
|
|
|
{
|
|
|
|
flexcans[i].can_dev.config = config;
|
|
|
|
ret = rt_hw_can_register(&flexcans[i].can_dev, flexcans[i].name, &imxrt_can_ops, &flexcans[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
INIT_BOARD_EXPORT(rt_hw_can_init);
|
|
|
|
|
|
|
|
#endif /* BSP_USING_CAN */
|