2019-10-24 17:56:09 +08:00
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/*
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2023-01-06 16:40:35 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2019-10-24 17:56:09 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-04-20 tyustli the first version.
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* 2019-07-15 Magicoe The first version for LPC55S6x, timeout unit is S not mS
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*
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*/
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#include <rtthread.h>
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#ifdef BSP_USING_WDT
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#if !defined(BSP_USING_WDT)
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#error "Please define at least one BSP_USING_WDOGx"
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#endif
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#define LOG_TAG "drv.wdt"
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#include <drv_log.h>
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#include "drv_wdt.h"
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#include <rthw.h>
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#include "rtdevice.h"
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#if defined(BSP_USING_WDT)
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#include "fsl_wwdt.h"
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2023-04-28 19:26:01 +08:00
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struct lpc_wdt_obj
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{
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rt_watchdog_t watchdog;
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rt_uint16_t is_start;
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};
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static struct lpc_wdt_obj lpc_wdt;
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2019-10-24 17:56:09 +08:00
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static wwdt_config_t WWDT1_config =
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{
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/* Enable the watch dog */
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.enableWwdt = true,
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/* Disable the watchdog timeout reset */
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.enableWatchdogReset = false,
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/* Disable the watchdog protection for updating the timeout value */
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.enableWatchdogProtect = false,
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/* Windowing is not in effect */
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.windowValue = 0xFFFFFFU,
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/* Set the timeout value to the max */
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.timeoutValue = 0xFFFFFFU,
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/* No warning is provided */
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.warningValue = 0,
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/* Set clock frequency. */
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2021-03-17 02:26:35 +08:00
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.clockFreq_Hz = 0U,
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2019-10-24 17:56:09 +08:00
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};
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void WDT_BOD_IRQHandler(void)
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{
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uint32_t wdtStatus = WWDT_GetStatusFlags(WWDT);
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/* The chip will reset before this happens */
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if (wdtStatus & kWWDT_TimeoutFlag)
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{
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/* A watchdog feed didn't occur prior to window timeout */
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/* Stop WDT */
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WWDT_Disable(WWDT);
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WWDT_ClearStatusFlags(WWDT, kWWDT_TimeoutFlag);
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/* Needs restart */
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WWDT_Enable(WWDT);
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}
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/* Handle warning interrupt */
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if (wdtStatus & kWWDT_WarningFlag)
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{
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/* A watchdog feed didn't occur prior to warning timeout */
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WWDT_ClearStatusFlags(WWDT, kWWDT_WarningFlag);
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/* User code. User can do urgent case before timeout reset.
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* IE. user can backup the ram data or ram log to flash.
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* the period is set by config.warningValue, user need to
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* check the period between warning interrupt and timeout.
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*/
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}
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}
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static rt_err_t lpc_wwdt_close(rt_watchdog_t *wdt)
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{
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rt_uint32_t level;
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WWDT_Type *base;
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base = (WWDT_Type *)wdt->parent.user_data;
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level = rt_hw_interrupt_disable();
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WWDT_Disable(base);
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t lpc_wwdt_open(rt_watchdog_t *wdt, rt_uint16_t oflag)
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{
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WWDT_Type *base;
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base = (WWDT_Type *)wdt->parent.user_data;
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rt_uint32_t level;
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level = rt_hw_interrupt_disable();
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WWDT_Enable(base);
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t lpc_wwdt_init(rt_watchdog_t *wdt)
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{
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WWDT_Type *base;
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base = (WWDT_Type *)wdt->parent.user_data;
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/* Enable FRO 1M clock for WWDT module. */
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SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_FRO1MHZ_CLK_ENA_MASK;
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/* Set clock divider for WWDT clock source. */
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CLOCK_SetClkDiv(kCLOCK_DivWdtClk, 1U, true);
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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WWDT_GetDefaultConfig(&WWDT1_config);
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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/*
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* Set watchdog feed time constant to approximately 4s
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* Set watchdog warning time to 512 ticks after feed time constant
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* Set watchdog window time to 1s
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*/
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/* The WDT divides the input frequency into it by 4 */
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2023-04-28 19:26:01 +08:00
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WWDT1_config.timeoutValue = (CLOCK_GetWdtClkFreq() / 4) * 4;
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2019-10-24 17:56:09 +08:00
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WWDT1_config.warningValue = 512;
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2023-04-28 19:26:01 +08:00
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WWDT1_config.windowValue = (CLOCK_GetWdtClkFreq() / 4) * 1;
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2019-10-24 17:56:09 +08:00
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/* Configure WWDT to reset on timeout */
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WWDT1_config.enableWatchdogReset = true;
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/* Setup watchdog clock frequency(Hz). */
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2023-04-28 19:26:01 +08:00
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WWDT1_config.clockFreq_Hz = CLOCK_GetWdtClkFreq();
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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WWDT_Init(base, &WWDT1_config);
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lpc_wwdt_close(wdt);
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return RT_EOK;
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}
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static rt_err_t lpc_wwdt_refresh(rt_watchdog_t *wdt)
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{
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WWDT_Type *base;
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base = (WWDT_Type *)wdt->parent.user_data;
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rt_uint32_t level;
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level = rt_hw_interrupt_disable();
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WWDT_Refresh(base);
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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/**
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* @function control wdog
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*
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* @param
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* wdt whick wdog used
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* cmd control wdog options
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* args argument of conrtol
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* @retval rt_err_t the status of control result
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*
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* @attention wdog1 is can not get left time(register not exist) and wdogs unit is seconds
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*
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*/
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static rt_err_t lpc_wwdt_control(rt_watchdog_t *wdt, int cmd, void *args)
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{
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RT_ASSERT(wdt != NULL);
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WWDT_Type *base;
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base = (WWDT_Type *)wdt->parent.user_data;
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switch(cmd)
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{
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case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
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{
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*(uint16_t *)args = WWDT1_config.timeoutValue;
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}
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break;
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case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
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{
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RT_ASSERT(*(uint16_t *)args != 0);
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2021-03-17 02:26:35 +08:00
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2023-04-28 19:26:01 +08:00
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WWDT1_config.timeoutValue = (CLOCK_GetWdtClkFreq() / 4) * (*(uint16_t *)args) * 2;
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2019-10-24 17:56:09 +08:00
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WWDT1_config.warningValue = 512;
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2023-04-28 19:26:01 +08:00
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WWDT1_config.windowValue = (CLOCK_GetWdtClkFreq() / 4) * (*(uint16_t *)args) * 2 / 4;
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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base->TC = WWDT_TC_COUNT(WWDT1_config.timeoutValue);
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base->WINDOW = WWDT_WINDOW_WINDOW(WWDT1_config.windowValue);
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base->WARNINT = WWDT_WARNINT_WARNINT(WWDT1_config.warningValue);
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WWDT_Refresh(base);
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lpc_wwdt_close(wdt);
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}
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break;
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case RT_DEVICE_CTRL_WDT_KEEPALIVE:
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{
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lpc_wwdt_refresh(wdt);
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}
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break;
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case RT_DEVICE_CTRL_WDT_START:
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{
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lpc_wwdt_open(wdt, *(rt_uint32_t *)args);
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}
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break;
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case RT_DEVICE_CTRL_WDT_STOP:
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{
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lpc_wwdt_close(wdt);
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}
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break;
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default:
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2023-03-16 12:44:05 +08:00
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return -RT_EINVAL;
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2019-10-24 17:56:09 +08:00
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}
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return RT_EOK;
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}
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static struct rt_watchdog_ops lpc_wwdt_ops =
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{
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.init = lpc_wwdt_init,
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.control = lpc_wwdt_control,
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};
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#endif /* BSP_USING_WDT */
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int rt_hw_wdt_init(void)
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{
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rt_err_t ret = RT_EOK;
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#if defined (BSP_USING_WDT)
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2023-04-28 19:26:01 +08:00
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lpc_wdt.watchdog.ops = &lpc_wwdt_ops;
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2019-10-24 17:56:09 +08:00
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2023-04-28 19:26:01 +08:00
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ret = rt_hw_watchdog_register(&lpc_wdt.watchdog, "wdt", RT_DEVICE_FLAG_RDWR, WWDT);
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2019-10-24 17:56:09 +08:00
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if (ret != RT_EOK)
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{
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2023-10-03 08:18:31 +08:00
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LOG_E("rt device register failed %d", ret);
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2019-10-24 17:56:09 +08:00
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}
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#endif /* BSP_USING_WDT */
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return ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_wdt_init);
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#endif /* BSP_USING_WDT */
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