126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-01-31 shelton first version
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*/
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#ifndef __SPI_CONFIG_H__
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#define __SPI_CONFIG_H__
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#include <rtthread.h>
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#include "dma_config.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SPI1_IRQHandler SPI1_IRQHandler
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#define SPI2_IRQHandler SPI2_IRQHandler
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#define SPI3_IRQHandler SPI3_IRQHandler
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#ifdef BSP_USING_SPI1
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#define SPI1_CONFIG \
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{ \
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.spi_x = SPI1, \
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.spi_name = "spi1", \
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.irqn = SPI1_IRQn, \
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}
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#endif /* BSP_USING_SPI1 */
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#ifdef BSP_SPI1_RX_USING_DMA
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#define SPI1_RX_DMA_CONFIG \
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{ \
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.dma_channel = SPI1_RX_DMA_CHANNEL, \
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.dma_clock = SPI1_RX_DMA_CLOCK, \
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.dma_irqn = SPI1_RX_DMA_IRQ, \
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.flex_channel = SPI1_RX_DMA_FLEX_CHANNEL, \
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.request_id = SPI1_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_SPI1_RX_USING_DMA */
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#ifdef BSP_SPI1_TX_USING_DMA
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#define SPI1_TX_DMA_CONFIG \
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{ \
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.dma_channel = SPI1_TX_DMA_CHANNEL, \
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.dma_clock = SPI1_TX_DMA_CLOCK, \
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.dma_irqn = SPI1_TX_DMA_IRQ, \
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.flex_channel = SPI1_TX_DMA_FLEX_CHANNEL, \
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.request_id = SPI1_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_SPI1_TX_USING_DMA */
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#ifdef BSP_USING_SPI2
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#define SPI2_CONFIG \
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{ \
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.spi_x = SPI2, \
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.spi_name = "spi2", \
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.irqn = SPI2_IRQn, \
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}
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#endif /* BSP_USING_SPI2 */
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#ifdef BSP_SPI2_RX_USING_DMA
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#define SPI2_RX_DMA_CONFIG \
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{ \
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.dma_channel = SPI2_RX_DMA_CHANNEL, \
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.dma_clock = SPI2_RX_DMA_CLOCK, \
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.dma_irqn = SPI2_RX_DMA_IRQ, \
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.flex_channel = SPI2_RX_DMA_FLEX_CHANNEL, \
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.request_id = SPI2_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_SPI2_RX_USING_DMA */
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#ifdef BSP_SPI2_TX_USING_DMA
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#define SPI2_TX_DMA_CONFIG \
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{ \
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.dma_channel = SPI2_TX_DMA_CHANNEL, \
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.dma_clock = SPI2_TX_DMA_CLOCK, \
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.dma_irqn = SPI2_TX_DMA_IRQ, \
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.flex_channel = SPI2_TX_DMA_FLEX_CHANNEL, \
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.request_id = SPI2_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_SPI2_TX_USING_DMA */
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#ifdef BSP_USING_SPI3
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#define SPI3_CONFIG \
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{ \
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.spi_x = SPI3, \
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.spi_name = "spi3", \
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.irqn = SPI3_IRQn, \
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}
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#endif /* BSP_USING_SPI3 */
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#ifdef BSP_SPI3_RX_USING_DMA
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#define SPI3_RX_DMA_CONFIG \
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{ \
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.dma_channel = SPI3_RX_DMA_CHANNEL, \
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.dma_clock = SPI3_RX_DMA_CLOCK, \
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.dma_irqn = SPI3_RX_DMA_IRQ, \
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.flex_channel = SPI3_RX_DMA_FLEX_CHANNEL, \
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.request_id = SPI3_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_SPI3_RX_USING_DMA */
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#ifdef BSP_SPI3_TX_USING_DMA
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#define SPI3_TX_DMA_CONFIG \
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{ \
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.dma_channel = SPI3_TX_DMA_CHANNEL, \
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.dma_clock = SPI3_TX_DMA_CLOCK, \
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.dma_irqn = SPI3_TX_DMA_IRQ, \
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.flex_channel = SPI3_TX_DMA_FLEX_CHANNEL, \
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.request_id = SPI3_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_SPI2_TX_USING_DMA */
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#ifdef __cplusplus
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}
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#endif
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#endif /*__SPI_CONFIG_H__ */
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