261 lines
12 KiB
C
261 lines
12 KiB
C
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-11-09 shelton first version
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*/
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#ifndef __UART_CONFIG_H__
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#define __UART_CONFIG_H__
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#include <rtthread.h>
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#include "dma_config.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define UART1_IRQHandler USART1_IRQHandler
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#define UART2_IRQHandler USART2_IRQHandler
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#define UART3_IRQHandler USART3_IRQHandler
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#define UART4_IRQHandler USART4_IRQHandler
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#define UART5_IRQHandler USART5_IRQHandler
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#define UART6_IRQHandler USART6_IRQHandler
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#define UART7_IRQHandler USART7_IRQHandler
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#define UART8_IRQHandler USART8_IRQHandler
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#if defined(BSP_USING_UART1)
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#define UART1_CONFIG \
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{ \
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.name = "uart1", \
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.uart_x = USART1, \
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.irqn = USART1_IRQn, \
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}
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#if defined(BSP_UART1_RX_USING_DMA)
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#define UART1_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART1_RX_DMA_CHANNEL, \
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.dma_clock = UART1_RX_DMA_CLOCK, \
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.dma_irqn = UART1_RX_DMA_IRQ, \
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.dmamux_channel = UART1_RX_DMA_MUX_CHANNEL, \
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.request_id = UART1_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART1_RX_USING_DMA */
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#if defined(BSP_UART1_TX_USING_DMA)
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#define UART1_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART1_TX_DMA_CHANNEL, \
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.dma_clock = UART1_TX_DMA_CLOCK, \
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.dma_irqn = UART1_TX_DMA_IRQ, \
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.dmamux_channel = UART1_TX_DMA_MUX_CHANNEL, \
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.request_id = UART1_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART1_TX_USING_DMA */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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#define UART2_CONFIG \
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{ \
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.name = "uart2", \
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.uart_x = USART2, \
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.irqn = USART2_IRQn, \
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}
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#if defined(BSP_UART2_RX_USING_DMA)
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#define UART2_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART2_RX_DMA_CHANNEL, \
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.dma_clock = UART2_RX_DMA_CLOCK, \
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.dma_irqn = UART2_RX_DMA_IRQ, \
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.dmamux_channel = UART2_RX_DMA_MUX_CHANNEL, \
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.request_id = UART2_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART2_RX_USING_DMA */
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#if defined(BSP_UART2_TX_USING_DMA)
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#define UART2_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART2_TX_DMA_CHANNEL, \
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.dma_clock = UART2_TX_DMA_CLOCK, \
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.dma_irqn = UART2_TX_DMA_IRQ, \
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.dmamux_channel = UART2_TX_DMA_MUX_CHANNEL, \
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.request_id = UART2_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART2_TX_USING_DMA */
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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#define UART3_CONFIG \
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{ \
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.name = "uart3", \
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.uart_x = USART3, \
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.irqn = USART3_IRQn, \
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}
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#if defined(BSP_UART3_RX_USING_DMA)
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#define UART3_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART3_RX_DMA_CHANNEL, \
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.dma_clock = UART3_RX_DMA_CLOCK, \
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.dma_irqn = UART3_RX_DMA_IRQ, \
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.dmamux_channel = UART3_RX_DMA_MUX_CHANNEL, \
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.request_id = UART3_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART3_RX_USING_DMA */
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#if defined(BSP_UART3_TX_USING_DMA)
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#define UART3_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART3_TX_DMA_CHANNEL, \
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.dma_clock = UART3_TX_DMA_CLOCK, \
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.dma_irqn = UART3_TX_DMA_IRQ, \
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.dmamux_channel = UART3_TX_DMA_MUX_CHANNEL, \
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.request_id = UART3_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART3_TX_USING_DMA */
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART4)
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#define UART4_CONFIG \
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{ \
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.name = "uart4", \
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.uart_x = USART4, \
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.irqn = USART4_IRQn, \
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}
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#if defined(BSP_UART4_RX_USING_DMA)
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#define UART4_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART4_RX_DMA_CHANNEL, \
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.dma_clock = UART4_RX_DMA_CLOCK, \
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.dma_irqn = UART4_RX_DMA_IRQ, \
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.dmamux_channel = UART4_RX_DMA_MUX_CHANNEL, \
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.request_id = UART4_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART4_RX_USING_DMA */
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#if defined(BSP_UART4_TX_USING_DMA)
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#define UART4_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART4_TX_DMA_CHANNEL, \
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.dma_clock = UART4_TX_DMA_CLOCK, \
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.dma_irqn = UART4_TX_DMA_IRQ, \
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.dmamux_channel = UART4_TX_DMA_MUX_CHANNEL, \
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.request_id = UART4_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART4_TX_USING_DMA */
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#endif /* BSP_USING_UART4 */
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#if defined(BSP_USING_UART5)
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#define UART5_CONFIG \
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{ \
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.name = "uart5", \
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.uart_x = USART5, \
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.irqn = USART5_IRQn, \
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}
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#if defined(BSP_UART5_RX_USING_DMA)
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#define UART5_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART5_RX_DMA_CHANNEL, \
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.dma_clock = UART5_RX_DMA_CLOCK, \
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.dma_irqn = UART5_RX_DMA_IRQ, \
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.dmamux_channel = UART5_RX_DMA_MUX_CHANNEL, \
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.request_id = UART5_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART5_RX_USING_DMA */
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#if defined(BSP_UART5_TX_USING_DMA)
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#define UART5_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART5_TX_DMA_CHANNEL, \
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.dma_clock = UART5_TX_DMA_CLOCK, \
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.dma_irqn = UART5_TX_DMA_IRQ, \
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.dmamux_channel = UART5_TX_DMA_MUX_CHANNEL, \
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.request_id = UART5_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART5_TX_USING_DMA */
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#endif /* BSP_USING_UART5 */
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#if defined(BSP_USING_UART6)
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#define UART6_CONFIG \
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{ \
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.name = "uart6", \
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.uart_x = USART6, \
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.irqn = USART6_IRQn, \
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}
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#if defined(BSP_UART6_RX_USING_DMA)
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#define UART6_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART6_RX_DMA_CHANNEL, \
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.dma_clock = UART6_RX_DMA_CLOCK, \
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.dma_irqn = UART6_RX_DMA_IRQ, \
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.dmamux_channel = UART6_RX_DMA_MUX_CHANNEL, \
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.request_id = UART6_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART6_RX_USING_DMA */
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#if defined(BSP_UART6_TX_USING_DMA)
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#define UART6_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART6_TX_DMA_CHANNEL, \
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.dma_clock = UART6_TX_DMA_CLOCK, \
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.dma_irqn = UART6_TX_DMA_IRQ, \
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.dmamux_channel = UART6_TX_DMA_MUX_CHANNEL, \
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.request_id = UART6_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART6_TX_USING_DMA */
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#endif /* BSP_USING_UART6 */
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#if defined(BSP_USING_UART7)
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#define UART7_CONFIG \
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{ \
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.name = "uart7", \
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.uart_x = USART7, \
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.irqn = USART7_IRQn, \
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}
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#if defined(BSP_UART7_RX_USING_DMA)
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#define UART7_RX_DMA_CONFIG \
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{ \
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.dma_channel = UART7_RX_DMA_CHANNEL, \
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.dma_clock = UART7_RX_DMA_CLOCK, \
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.dma_irqn = UART7_RX_DMA_IRQ, \
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.dmamux_channel = UART7_RX_DMA_MUX_CHANNEL, \
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.request_id = UART7_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART7_RX_USING_DMA */
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#if defined(BSP_UART7_TX_USING_DMA)
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#define UART7_TX_DMA_CONFIG \
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{ \
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.dma_channel = UART7_TX_DMA_CHANNEL, \
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.dma_clock = UART7_TX_DMA_CLOCK, \
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.dma_irqn = UART7_TX_DMA_IRQ, \
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.dmamux_channel = UART7_TX_DMA_MUX_CHANNEL, \
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.request_id = UART7_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_UART7_TX_USING_DMA */
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#endif /* BSP_USING_UART7 */
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#if defined(BSP_USING_UART8)
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#define UART8_CONFIG \
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{ \
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.name = "uart8", \
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.uart_x = USART8, \
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.irqn = USART8_IRQn, \
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}
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#endif /* BSP_USING_UART8 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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