256 lines
7.2 KiB
C
256 lines
7.2 KiB
C
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fspim_hw.c
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-18 09:08:00
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* Description: This files is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 zhugengyu 2021-12-3 init commit
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* 1.1 zhugengyu 2022-4-15 support test mode
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*/
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#include "fassert.h"
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#include "fdebug.h"
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#include "fspim_hw.h"
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#include "fspim.h"
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/***************************** Include Files *********************************/
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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#define FSPIM_DEBUG_TAG "SPIM-HW"
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#define FSPIM_ERROR(format, ...) FT_DEBUG_PRINT_E(FSPIM_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FSPIM_WARN(format, ...) FT_DEBUG_PRINT_W(FSPIM_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FSPIM_INFO(format, ...) FT_DEBUG_PRINT_I(FSPIM_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FSPIM_DEBUG(format, ...) FT_DEBUG_PRINT_D(FSPIM_DEBUG_TAG, format, ##__VA_ARGS__)
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/************************** Function Prototypes ******************************/
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/**
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* @name: FSpimGetTxFifoDepth
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* @msg: 获取TX Fifo可以设置的最大深度
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* @return {u32} TX Fifo的深度
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* @param {uintptr} base_addr, SPI控制器基地址
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*/
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u32 FSpimGetTxFifoDepth(uintptr base_addr)
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{
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u32 fifo_depth;
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for (fifo_depth = 1; fifo_depth < FSPIM_MAX_FIFO_DEPTH; fifo_depth++)
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{
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FSpimSetTxFifoThreshold(base_addr, fifo_depth);
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if (fifo_depth != FSpimGetTxFifoThreshold(base_addr))
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{
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FSPIM_INFO("Tx fifo threshold is %d", fifo_depth);
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break;
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}
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}
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FSpimSetTxFifoThreshold(base_addr, 0);
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return fifo_depth;
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}
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/**
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* @name: FSpimGetRxFifoDepth
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* @msg: 获取RX Fifo可以设置的最大深度
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* @return {u32} Rx Fifo的深度
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* @param {uintptr} base_addr, SPI控制器基地址
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*/
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u32 FSpimGetRxFifoDepth(uintptr base_addr)
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{
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u32 fifo_depth = FSPIM_MIN_FIFO_DEPTH;
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while (FSPIM_MAX_FIFO_DEPTH >= fifo_depth)
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{
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FSpimSetRxFifoThreshold(base_addr, fifo_depth);
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if (fifo_depth != FSpimGetRxFifoThreshold(base_addr))
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{
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FSPIM_INFO("Rx fifo threshold is %d", fifo_depth);
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break;
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}
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fifo_depth++;
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}
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return fifo_depth;
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}
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/**
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* @name: FSpimSelSlaveDev
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* @msg: 选择SPI从设备
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* @return {无}
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* @param {uintptr} base_addr, SPI控制器基地址
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* @param {u32} slave_dev_id, 从设备ID
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*/
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void FSpimSelSlaveDev(uintptr base_addr, u32 slave_dev_id)
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{
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FASSERT(slave_dev_id < FSPIM_NUM_OF_SLAVE_DEV);
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u32 reg_val;
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reg_val = (FSPIM_SER_SELECT << slave_dev_id);
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FSPIM_WRITE_REG32(base_addr, FSPIM_SER_OFFSET, reg_val);
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return;
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}
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/**
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* @name: FSpimSetSpeed
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* @msg: 设置SPI传输速度
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* @return {FError}
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* @param {uintptr} base_addr, SPI控制器基地址
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* @param {u32} speed, SPI传输速度设置
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*/
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FError FSpimSetSpeed(uintptr base_addr, u32 speed)
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{
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u32 clk_div;
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boolean enabled = FSpimGetEnable(base_addr);
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if (enabled)
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FSpimSetEnable(base_addr, FALSE);
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clk_div = FSPI_FREQ / speed;
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FSPIM_INFO("set clk div as %d", clk_div);
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FSPIM_WRITE_REG32(base_addr, FSPIM_BAUD_R_OFFSET, clk_div);
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if (enabled)
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FSpimSetEnable(base_addr, TRUE);
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return FSPIM_SUCCESS;
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}
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/**
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* @name: FSpimSetTransMode
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* @msg: 设置SPI传输模式
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* @return {无}
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* @param {uintptr} base_addr, SPI控制器基地址
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* @param {u32} trans_mode, SPI传输模式设置
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*/
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void FSpimSetTransMode(uintptr base_addr, u32 trans_mode)
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{
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FASSERT(trans_mode < FSPIM_TRANS_MODE_MAX);
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u32 reg_val;
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boolean enabled = FSpimGetEnable(base_addr);
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if (enabled)
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FSpimSetEnable(base_addr, FALSE);
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reg_val = FSpimGetCtrlR0(base_addr);
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reg_val &= ~FSPIM_CTRL_R0_TMOD_MASK; /* clear trans mode bits */
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switch (trans_mode)
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{
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case FSPIM_TRANS_MODE_RX_TX:
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reg_val |= FSPIM_CTRL_R0_TMOD(FSPIM_TMOD_RX_TX);
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break;
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case FSPIM_TRANS_MODE_TX_ONLY:
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reg_val |= FSPIM_CTRL_R0_TMOD(FSPIM_TMOD_TX_ONLY);
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break;
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case FSPIM_TRANS_MODE_RX_ONLY:
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reg_val |= FSPIM_CTRL_R0_TMOD(FSPIM_TMOD_RX_ONLY);
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break;
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case FSPIM_TRANS_MODE_READ_EEPROM:
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reg_val |= FSPIM_CTRL_R0_TMOD(FSPIM_TMOD_RD_EEPROM);
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break;
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default:
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FASSERT(0);
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break;
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}
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FSpimSetCtrlR0(base_addr, reg_val);
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if (enabled)
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FSpimSetEnable(base_addr, TRUE);
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return;
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}
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/**
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* @name: FSpimSetCpha
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* @msg: 设置串行时钟相位
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* @return {无}
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* @param {uintptr} base_addr, SPI控制器基地址
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* @param {u32} cpha_mode, SPI控制器的相位设置
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*/
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void FSpimSetCpha(uintptr base_addr, u32 cpha_mode)
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{
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u32 reg_val = FSpimGetCtrlR0(base_addr);
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reg_val &= ~FSPIM_CTRL_R0_SCPHA_MASK; /* clear bits */
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if (FSPIM_CPHA_1_EDGE == cpha_mode)
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reg_val |= FSPIM_CTRL_R0_SCPHA(FSPIM_SCPHA_SWITCH_DATA_MID);
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else if (FSPIM_CPHA_2_EDGE == cpha_mode)
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reg_val |= FSPIM_CTRL_R0_SCPHA(FSPIM_SCPHA_SWITCH_DATA_BEG);
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else
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FASSERT(0);
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FSpimSetCtrlR0(base_addr, reg_val);
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}
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/**
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* @name: FSpimSetCpol
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* @msg: 设置串行时钟极性
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* @return {无}
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* @param {uintptr} base_addr, SPI控制器基地址
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* @param {u32} cpol_mode, SPI控制器的极性设置
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*/
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void FSpimSetCpol(uintptr base_addr, u32 cpol_mode)
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{
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u32 reg_val = FSpimGetCtrlR0(base_addr);
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reg_val &= ~FSPIM_CTRL_R0_SCPOL_MASK; /* clear bits */
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if (FSPIM_CPOL_LOW == cpol_mode)
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reg_val |= FSPIM_CTRL_R0_SCPOL(FSPIM_SCPOL_INACTIVE_LOW);
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else if (FSPIM_CPOL_HIGH == cpol_mode)
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reg_val |= FSPIM_CTRL_R0_SCPOL(FSPIM_SCPOL_INACTIVE_HIGH);
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else
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FASSERT(0);
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FSpimSetCtrlR0(base_addr, reg_val);
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}
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/**
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* @name: FSpimSetSlaveEnable
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* @msg: 使能/去使能和从设备的连接
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* @return {无}
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* @param {uintptr} base_addr, SPI控制器基地址
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* @param {boolean} enable, TRUE: 使能从设备, FALSE: 去使能从设备
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*/
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void FSpimSetSlaveEnable(uintptr base_addr, boolean enable)
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{
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u32 reg_val;
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boolean enabled = FSpimGetEnable(base_addr);
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if (enabled)
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FSpimSetEnable(base_addr, FALSE);
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reg_val = FSpimGetCtrlR0(base_addr);
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reg_val &= ~FSPIM_CTRL_R0_SLV_OE_MASK;
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if (enable)
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reg_val |= FSPIM_CTRL_R0_SLV_OE(FSPIM_SLAVE_TX_ENABLE);
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else
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reg_val |= FSPIM_CTRL_R0_SLV_OE(FSPIM_SLAVE_TX_DISALE);
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FSpimSetCtrlR0(base_addr, reg_val);
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if (enabled)
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FSpimSetEnable(base_addr, TRUE);
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return;
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}
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