75 lines
2.7 KiB
C
75 lines
2.7 KiB
C
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fpcie_g.c
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* Date: 2022-02-10 14:55:11
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* LastEditTime: 2022-02-18 08:58:07
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* Description: This files is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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#include "fpcie.h"
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#include "fpcie_hw.h"
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#include "fparameters.h"
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#include "sdkconfig.h"
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FPcieConfig FPcieConfigTable[FT_PCIE_NUM] =
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{
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{
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.instance_id = FT_PCIE0_ID, /* Id of device*/
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.irq_num = FT_PCIE0_MISC_IRQ_NUM, // Irq number
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.ecam = FT_PCI_CONFIG_BASEADDR, /* The Memory way */
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.peu0_config_address = FT_PCI_EU0_CONFIG_BASEADDR,
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.peu1_config_address = FT_PCI_EU1_CONFIG_BASEADDR,
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.control_c0_address = FT_PCI_EU0_C0_CONTROL_BASEADDR,
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.control_c1_address = FT_PCI_EU0_C1_CONTROL_BASEADDR,
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.control_c2_address = FT_PCI_EU0_C2_CONTROL_BASEADDR,
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.control_c3_address = FT_PCI_EU1_C0_CONTROL_BASEADDR,
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.control_c4_address = FT_PCI_EU1_C1_CONTROL_BASEADDR,
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.control_c5_address = FT_PCI_EU1_C2_CONTROL_BASEADDR,
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#ifdef FT_PCI_INTX_EOI
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.intx_peux_stat_address =
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{
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[0] = FT_PCI_INTX_PEU0_STAT,
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[1] = FT_PCI_INTX_PEU1_STAT,
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},
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.intx_control_eux_cx_address =
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{
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[0] = FT_PCI_INTX_EU0_C0_CONTROL,
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[1] = FT_PCI_INTX_EU0_C1_CONTROL,
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[2] = FT_PCI_INTX_EU0_C2_CONTROL,
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[3] = FT_PCI_INTX_EU1_C0_CONTROL,
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[4] = FT_PCI_INTX_EU1_C1_CONTROL,
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[5] = FT_PCI_INTX_EU1_C2_CONTROL,
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},
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#endif
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.io_base_addr = FT_PCI_IO_CONFIG_BASEADDR,
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.io_size = FT_PCI_IO_CONFIG_REG_LENGTH,
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.npmem_base_addr = FT_PCI_MEM32_BASEADDR,
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.npmem_size = FT_PCI_MEM32_REG_LENGTH,
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.pmem_base_addr = FT_PCI_MEM64_BASEADDR, /* Prefetchable memory */
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.pmem_size = FT_PCI_MEM64_REG_LENGTH,
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.inta_irq_num = FT_PCI_INTA_IRQ_NUM,
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.intb_irq_num = FT_PCI_INTB_IRQ_NUM,
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.intc_irq_num = FT_PCI_INTC_IRQ_NUM,
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.intd_irq_num = FT_PCI_INTD_IRQ_NUM,
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.need_skip = FT_PCI_NEED_SKIP
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}
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};
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