2022-12-03 12:07:44 +08:00
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#ifndef RT_CONFIG_H__
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#define RT_CONFIG_H__
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/* Automatically generated file; DO NOT EDIT. */
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/* RT-Thread Project Configuration */
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/* RT-Thread Kernel */
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#define RT_NAME_MAX 20
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#define RT_USING_SMART
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#define RT_ALIGN_SIZE 8
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#define RT_THREAD_PRIORITY_32
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#define RT_THREAD_PRIORITY_MAX 32
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#define RT_TICK_PER_SECOND 100
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#define RT_USING_HOOK
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#define RT_HOOK_USING_FUNC_PTR
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#define RT_USING_IDLE_HOOK
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#define RT_IDLE_HOOK_LIST_SIZE 4
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#define IDLE_THREAD_STACK_SIZE 16384
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#define RT_USING_TIMER_SOFT
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#define RT_TIMER_THREAD_PRIO 4
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#define RT_TIMER_THREAD_STACK_SIZE 16384
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/* kservice optimization */
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#define RT_KSERVICE_USING_STDLIB
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#define RT_KPRINTF_USING_LONGLONG
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#define RT_DEBUG
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/* Inter-Thread communication */
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#define RT_USING_SEMAPHORE
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#define RT_USING_MUTEX
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#define RT_USING_EVENT
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#define RT_USING_MAILBOX
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#define RT_USING_MESSAGEQUEUE
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/* Memory Management */
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2023-01-09 10:08:55 +08:00
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#define RT_PAGE_MAX_ORDER 11
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2022-12-03 12:07:44 +08:00
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#define RT_USING_MEMPOOL
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#define RT_USING_SMALL_MEM
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#define RT_USING_SMALL_MEM_AS_HEAP
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#define RT_USING_MEMTRACE
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#define RT_USING_HEAP
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/* Kernel Device Object */
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#define RT_USING_DEVICE
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 256
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#define RT_CONSOLE_DEVICE_NAME "uart0"
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#define RT_VER_NUM 0x50000
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#define ARCH_CPU_64BIT
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#define RT_USING_CACHE
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#define ARCH_MM_MMU
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2023-01-16 08:24:03 +08:00
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#define KERNEL_VADDR_START 0x40000000
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2022-12-03 12:07:44 +08:00
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#define ARCH_RISCV
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#define ARCH_RISCV64
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/* RT-Thread Components */
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_USER_MAIN
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#define RT_MAIN_THREAD_STACK_SIZE 16384
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#define RT_MAIN_THREAD_PRIORITY 10
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#define RT_USING_MSH
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#define RT_USING_FINSH
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#define FINSH_USING_MSH
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#define FINSH_THREAD_NAME "tshell"
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#define FINSH_THREAD_PRIORITY 20
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#define FINSH_THREAD_STACK_SIZE 8192
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#define FINSH_USING_HISTORY
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#define FINSH_HISTORY_LINES 5
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#define FINSH_USING_SYMTAB
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#define FINSH_CMD_SIZE 80
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#define MSH_USING_BUILT_IN_COMMANDS
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#define FINSH_USING_DESCRIPTION
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#define FINSH_ARG_MAX 10
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#define RT_USING_DFS
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#define DFS_USING_POSIX
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#define DFS_USING_WORKDIR
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#define DFS_FILESYSTEMS_MAX 8
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#define DFS_FILESYSTEM_TYPES_MAX 4
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#define DFS_FD_MAX 32
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#define RT_USING_DFS_ELMFAT
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/* elm-chan's FatFs, Generic FAT Filesystem Module */
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#define RT_DFS_ELM_CODE_PAGE 936
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#define RT_DFS_ELM_WORD_ACCESS
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#define RT_DFS_ELM_USE_LFN_3
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#define RT_DFS_ELM_USE_LFN 3
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#define RT_DFS_ELM_LFN_UNICODE_0
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#define RT_DFS_ELM_LFN_UNICODE 0
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#define RT_DFS_ELM_MAX_LFN 255
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#define RT_DFS_ELM_DRIVES 8
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#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
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#define RT_DFS_ELM_REENTRANT
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#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
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#define RT_USING_DFS_DEVFS
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#define RT_USING_FAL
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#define FAL_DEBUG_CONFIG
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#define FAL_DEBUG 1
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#define FAL_PART_HAS_TABLE_CFG
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2023-01-16 08:24:03 +08:00
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#define RT_USING_LWP
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2022-12-03 12:07:44 +08:00
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#define RT_LWP_MAX_NR 30
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#define LWP_TASK_STACK_SIZE 16384
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#define RT_CH_MSG_MAX_NR 1024
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#define LWP_CONSOLE_INPUT_BUFFER_SIZE 1024
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#define LWP_TID_MAX_NR 64
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#define RT_LWP_SHM_MAX_NR 64
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/* Device Drivers */
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#define RT_USING_DEVICE_IPC
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#define RT_UNAMED_PIPE_NUMBER 64
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#define RT_USING_SYSTEM_WORKQUEUE
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#define RT_SYSTEM_WORKQUEUE_STACKSIZE 4096
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#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
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#define RT_USING_SERIAL
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#define RT_USING_SERIAL_V2
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#define RT_USING_TTY
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#define RT_USING_PIN
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#define RT_USING_NULL
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#define RT_USING_ZERO
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#define RT_USING_RANDOM
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#define RT_USING_RTC
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#define RT_USING_WDT
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#define RT_USING_DEV_BUS
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/* Using USB */
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/* C/C++ and POSIX layer */
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#define RT_LIBC_DEFAULT_TIMEZONE 8
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/* POSIX (Portable Operating System Interface) layer */
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#define RT_USING_POSIX_FS
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#define RT_USING_POSIX_DEVIO
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#define RT_USING_POSIX_STDIO
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#define RT_USING_POSIX_POLL
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#define RT_USING_POSIX_SELECT
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#define RT_USING_POSIX_TERMIOS
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#define RT_USING_POSIX_DELAY
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#define RT_USING_POSIX_CLOCK
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/* Interprocess Communication (IPC) */
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#define RT_USING_POSIX_PIPE
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#define RT_USING_POSIX_PIPE_SIZE 512
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/* Socket is in the 'Network' category */
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/* Network */
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/* Utilities */
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/* RT-Thread Utestcases */
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/* RT-Thread online packages */
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/* IoT - internet of things */
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/* Wi-Fi */
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/* Marvell WiFi */
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/* Wiced WiFi */
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/* IoT Cloud */
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/* security packages */
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/* language packages */
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/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
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/* XML: Extensible Markup Language */
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/* multimedia packages */
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/* LVGL: powerful and easy-to-use embedded GUI library */
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/* u8g2: a monochrome graphic library */
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/* PainterEngine: A cross-platform graphics application framework written in C language */
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/* tools packages */
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/* system packages */
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/* enhanced kernel services */
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/* acceleration: Assembly language or algorithmic acceleration packages */
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/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
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/* Micrium: Micrium software products porting for RT-Thread */
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/* peripheral libraries and drivers */
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/* Kendryte SDK */
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/* AI packages */
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/* miscellaneous packages */
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/* project laboratory */
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/* samples: kernel and components samples */
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/* entertainment: terminal games and other interesting software packages */
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/* Arduino libraries */
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2023-01-09 10:08:55 +08:00
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/* Projects */
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2022-12-03 12:07:44 +08:00
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2023-01-09 10:08:55 +08:00
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/* Sensors */
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2022-12-03 12:07:44 +08:00
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2023-01-09 10:08:55 +08:00
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/* Display */
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2022-12-03 12:07:44 +08:00
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2023-01-09 10:08:55 +08:00
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/* Timing */
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/* Data Processing */
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/* Data Storage */
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/* Communication */
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/* Device Control */
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/* Other */
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/* Signal IO */
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/* Uncategorized */
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2022-12-03 12:07:44 +08:00
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#define BOARD_allwinnerd1s
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#define __STACKSIZE__ 16384
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/* General Drivers Configuration */
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#define BSP_USING_M7
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/* General Purpose UARTs */
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#define BSP_USING_UART0
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#define UART0_TX_USING_GPIOE2
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#define UART0_RX_USING_GPIOE3
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#define BSP_USING_SDMMC
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#define SD_CARD_CHECK
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#define BSP_USING_FS
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/* Board extended module Drivers */
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#define RT_USING_SUNXI_HAL
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/* UART Devices */
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/* CCMU Devices */
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#define DRIVERS_CCMU
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#define DRIVERS_SUNXI_CCU
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/* DMA Devices */
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#define DRIVERS_DMA
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/* GPIO Devices */
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#define DRIVERS_GPIO
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/* Video support for sunxi */
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#define DISP2_SUNXI
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#define SUNXI_DISP2_FB_DISABLE_ROTATE
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/* LCD panels select */
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#define LCD_SUPPORT_HE0801A068
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#define LCD_SUPPORT_WILLIAMLCD
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#define LCD_SUPPORT_LQ101R1SX03
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#define LCD_SUPPORT_INET_DSI_PANEL
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/* Display engine feature select */
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#define DISP2_SUNXI_SUPPORT_ENAHNCE
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/* Soc and board select */
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/* Board Select */
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/* Soc Select */
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/* SDMMC Devices */
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#define DRIVERS_SDMMC
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#define USE_SD
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#define USE_SDIO
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#define DETECT_CARD
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#define SDC_DMA_USED
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#define SDIO_IRQ_SUPPORT
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#define SDC_DMA_BUF_SIZE 64
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#define DRIVERS_SDC_CDPIN_PRESENT_VAL 0
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/* SPI Devices */
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#define DRIVERS_SPI
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/* TWI Devices */
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#define DRIVERS_TWI
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/* G2D Devices */
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#define DRIVERS_G2D
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/* CE Devices */
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#define DRIVERS_CE
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/* EFUSE Devices */
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#define DRIVERS_EFUSE
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#endif
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