91 lines
4.5 KiB
C
91 lines
4.5 KiB
C
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/*
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* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-28 CDT first version
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*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_ADC1
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#ifndef ADC1_CONFIG
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#define ADC1_CONFIG \
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{ \
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.name = "adc1", \
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.resolution = ADC_RESOLUTION_12BIT, \
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.data_align = ADC_DATAALIGN_RIGHT, \
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.eoc_poll_time_max = 100, \
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.hard_trig_enable = RT_FALSE, \
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.hard_trig_src = ADC_HARDTRIG_ADTRG_PIN, \
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.internal_trig0_comtrg0_enable = RT_FALSE, \
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.internal_trig0_comtrg1_enable = RT_FALSE, \
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.internal_trig0_sel = EVT_SRC_MAX, \
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.internal_trig1_comtrg0_enable = RT_FALSE, \
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.internal_trig1_comtrg1_enable = RT_FALSE, \
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.internal_trig1_sel = EVT_SRC_MAX, \
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.continue_conv_mode_enable = RT_FALSE, \
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.data_reg_auto_clear = RT_TRUE, \
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}
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#endif /* ADC1_CONFIG */
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#endif /* BSP_USING_ADC1 */
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#ifdef BSP_USING_ADC2
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#ifndef ADC2_CONFIG
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#define ADC2_CONFIG \
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{ \
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.name = "adc2", \
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.resolution = ADC_RESOLUTION_12BIT, \
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.data_align = ADC_DATAALIGN_RIGHT, \
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.eoc_poll_time_max = 100, \
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.hard_trig_enable = RT_FALSE, \
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.hard_trig_src = ADC_HARDTRIG_ADTRG_PIN, \
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.internal_trig0_comtrg0_enable = RT_FALSE, \
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.internal_trig0_comtrg1_enable = RT_FALSE, \
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.internal_trig0_sel = EVT_SRC_MAX, \
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.internal_trig1_comtrg0_enable = RT_FALSE, \
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.internal_trig1_comtrg1_enable = RT_FALSE, \
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.internal_trig1_sel = EVT_SRC_MAX, \
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.continue_conv_mode_enable = RT_FALSE, \
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.data_reg_auto_clear = RT_TRUE, \
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}
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#endif /* ADC2_CONFIG */
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#endif /* BSP_USING_ADC2 */
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#ifdef BSP_USING_ADC3
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#ifndef ADC3_CONFIG
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#define ADC3_CONFIG \
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{ \
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.name = "adc3", \
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.resolution = ADC_RESOLUTION_12BIT, \
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.data_align = ADC_DATAALIGN_RIGHT, \
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.eoc_poll_time_max = 100, \
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.hard_trig_enable = RT_FALSE, \
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.hard_trig_src = ADC_HARDTRIG_ADTRG_PIN, \
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.internal_trig0_comtrg0_enable = RT_FALSE, \
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.internal_trig0_comtrg1_enable = RT_FALSE, \
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.internal_trig0_sel = EVT_SRC_MAX, \
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.internal_trig1_comtrg0_enable = RT_FALSE, \
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.internal_trig1_comtrg1_enable = RT_FALSE, \
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.internal_trig1_sel = EVT_SRC_MAX, \
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.continue_conv_mode_enable = RT_FALSE, \
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.data_reg_auto_clear = RT_TRUE, \
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}
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#endif /* ADC3_CONFIG */
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#endif /* BSP_USING_ADC3 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ADC_CONFIG_H__ */
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