2018-05-30 22:17:25 +08:00
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/*
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2021-04-09 10:52:34 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2018-05-30 22:17:25 +08:00
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*
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2021-04-09 10:52:34 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2018-05-30 22:17:25 +08:00
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*
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* Change Logs:
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* Date Author Notes
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*/
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#include <rthw.h>
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#include <plic_driver.h>
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#include <platform.h>
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#include <encoding.h>
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#include <interrupt.h>
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#define MAX_HANDLERS PLIC_NUM_INTERRUPTS
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/* exception and interrupt handler table */
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static struct rt_irq_desc irq_desc[MAX_HANDLERS];
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static plic_instance_t g_plic;
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int irq)
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{
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PLIC_disable_interrupt(&g_plic, irq);
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_unmask(int irq)
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{
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PLIC_enable_interrupt(&g_plic, irq);
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PLIC_set_priority(&g_plic, irq, 1);
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}
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rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
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{
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rt_kprintf("UN-handled interrupt %d occurred!!!\n", vector);
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return RT_NULL;
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}
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void rt_hw_interrupt_init(void)
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{
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int idx;
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2021-04-09 10:52:34 +08:00
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2018-05-30 22:17:25 +08:00
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/* config interrupt vector*/
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asm volatile(
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"la t0, trap_entry\n"
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"csrw mtvec, t0"
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);
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2021-04-09 10:52:34 +08:00
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2018-05-30 22:17:25 +08:00
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/* enable global interrupt*/
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PLIC_init(&g_plic,
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PLIC_CTRL_ADDR,
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PLIC_NUM_INTERRUPTS,
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PLIC_NUM_PRIORITIES);
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/* init exceptions table */
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for (idx = 0; idx < MAX_HANDLERS; idx++)
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{
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rt_hw_interrupt_mask(idx);
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irq_desc[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
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irq_desc[idx].param = RT_NULL;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_snprintf(irq_desc[idx].name, RT_NAME_MAX - 1, "default");
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irq_desc[idx].counter = 0;
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#endif
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}
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2021-04-09 10:52:34 +08:00
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// enable machine external interrupt
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2018-05-30 22:17:25 +08:00
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set_csr(mie, MIP_MEIP);
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}
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rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
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{
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2020-02-24 20:12:23 +08:00
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return (rt_uint32_t)PLIC_claim_interrupt(&g_plic);
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2018-05-30 22:17:25 +08:00
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}
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void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
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{
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PLIC_complete_interrupt(&g_plic, id);
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param handler the interrupt service routine to be installed
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* @param param the interrupt service function parameter
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* @param name the interrupt name
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* @return old handler
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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2018-12-05 20:41:07 +08:00
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void *param, const char *name)
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2018-05-30 22:17:25 +08:00
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if(vector < MAX_HANDLERS)
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{
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old_handler = irq_desc[vector].handler;
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if (handler != RT_NULL)
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{
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irq_desc[vector].handler = (rt_isr_handler_t)handler;
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irq_desc[vector].param = param;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
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irq_desc[vector].counter = 0;
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#endif
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}
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}
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return old_handler;
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}
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/**
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2021-04-09 10:52:34 +08:00
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* This function will be call when external machine-level
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2018-05-30 22:17:25 +08:00
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* interrupt from PLIC occurred.
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*/
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void handle_m_ext_interrupt(void)
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{
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rt_isr_handler_t isr_func;
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rt_uint32_t irq;
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void *param;
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/* get irq number */
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irq = rt_hw_interrupt_get_active(0);
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/* get interrupt service routine */
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isr_func = irq_desc[irq].handler;
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param = irq_desc[irq].param;
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/* turn to interrupt service routine */
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isr_func(irq, param);
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rt_hw_interrupt_ack(0, irq);
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#ifdef RT_USING_INTERRUPT_INFO
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irq_desc[irq].counter ++;
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#endif
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}
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