2022-08-14 10:29:05 +08:00
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/*
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2022-08-17 00:43:24 +08:00
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* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
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2022-08-14 10:29:05 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-07-01 lik first version
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*/
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#include "drv_sdio.h"
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#ifdef RT_USING_SDIO
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#ifdef BSP_USING_SDIO
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//#define DRV_DEBUG
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#define LOG_TAG "drv.sdio"
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#include <drv_log.h>
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#define SDIO_BUFF_SIZE 4096
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#define SDIO_ALIGN_LEN 4
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#ifndef SDIO_MAX_FREQ
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2022-08-17 00:43:24 +08:00
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#define SDIO_MAX_FREQ (37500000)
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2022-08-14 10:29:05 +08:00
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#endif
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struct swm_sdio_pkg
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{
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struct rt_mmcsd_cmd *cmd;
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void *buff;
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rt_uint32_t flag;
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};
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typedef rt_err_t (*sdio_txconfig)(struct swm_sdio_pkg *pkg, rt_uint32_t *buff, int size);
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typedef rt_err_t (*sdio_rxconfig)(struct swm_sdio_pkg *pkg, rt_uint32_t *buff, int size);
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typedef rt_uint32_t (*sdio_clk_get)(SDIO_TypeDef *swm_sdio);
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struct swm_sdio_des
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{
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SDIO_TypeDef *swm_sdio;
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sdio_txconfig txconfig;
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sdio_rxconfig rxconfig;
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sdio_clk_get clk_get;
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};
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static struct rt_mmcsd_host *host;
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#define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER)
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#define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex);
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struct swm_sdio_device
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{
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struct rt_mmcsd_host *host;
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struct swm_sdio_des sdio_des;
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struct rt_event event;
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struct rt_mutex mutex;
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struct swm_sdio_pkg *pkg;
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};
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2022-12-12 02:12:03 +08:00
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rt_align(SDIO_ALIGN_LEN)
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2022-08-14 10:29:05 +08:00
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static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
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/**
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* @brief This function wait sdio completed.
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* @param sdio swm_sdio_device
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* @retval None
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*/
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static void swm_sdio_wait_completed(struct swm_sdio_device *sdio)
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{
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rt_uint32_t status;
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struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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SDIO_TypeDef *swm_sdio = sdio->sdio_des.swm_sdio;
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if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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rt_tick_from_millisecond(2000), &status) != RT_EOK)
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{
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LOG_E("wait completed timeout");
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cmd->err = -RT_ETIMEOUT;
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return;
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}
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if (sdio->pkg == RT_NULL)
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{
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return;
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}
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if (resp_type(cmd) == RESP_NONE)
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{
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;
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}
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else if (resp_type(cmd) == RESP_R2)
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{
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2022-08-17 00:43:24 +08:00
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LOG_D("R2");
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2022-08-14 10:29:05 +08:00
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cmd->resp[0] = (swm_sdio->RESP[3] << 8) + ((swm_sdio->RESP[2] >> 24) & 0xFF);
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cmd->resp[1] = (swm_sdio->RESP[2] << 8) + ((swm_sdio->RESP[1] >> 24) & 0xFF);
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cmd->resp[2] = (swm_sdio->RESP[1] << 8) + ((swm_sdio->RESP[0] >> 24) & 0xFF);
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cmd->resp[3] = (swm_sdio->RESP[0] << 8) + 0x00;
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}
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else
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{
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cmd->resp[0] = swm_sdio->RESP[0];
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}
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if (status & SDIO_IF_ERROR_Msk)
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{
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if ((status & SDIO_IF_CMDCRCERR_Msk) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
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{
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cmd->err = RT_EOK;
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}
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else
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{
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cmd->err = -RT_ERROR;
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}
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2022-08-17 00:43:24 +08:00
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if (status & SDIO_IF_CMDCRCERR_Msk)
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{
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SDIO->CR2 |= (1 << SDIO_CR2_RSTCMD_Pos);
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data->err = -RT_ERROR;
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}
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2023-12-26 18:58:40 +08:00
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2022-08-14 10:29:05 +08:00
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if (status & SDIO_IF_CMDTIMEOUT_Msk)
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{
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2022-08-17 00:43:24 +08:00
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SDIO->CR2 |= (1 << SDIO_CR2_RSTCMD_Pos);
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2022-08-14 10:29:05 +08:00
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cmd->err = -RT_ETIMEOUT;
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}
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2023-12-26 18:58:40 +08:00
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2022-08-14 10:29:05 +08:00
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if (status & SDIO_IF_DATCRCERR_Msk)
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{
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2022-08-17 00:43:24 +08:00
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SDIO->CR2 |= (1 << SDIO_CR2_RSTDAT_Pos);
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2022-08-14 10:29:05 +08:00
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data->err = -RT_ERROR;
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}
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if (status & SDIO_IF_DATTIMEOUT_Msk)
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{
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2022-08-17 00:43:24 +08:00
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SDIO->CR2 |= (1 << SDIO_CR2_RSTDAT_Pos);
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2022-08-14 10:29:05 +08:00
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data->err = -RT_ETIMEOUT;
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}
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if (cmd->err == RT_EOK)
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{
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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}
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else
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{
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2022-08-17 00:43:24 +08:00
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LOG_D("err:0x%08x, %s%s%s%s%s cmd:%d arg:0x%08x rw:%c len:%d blksize:%d",
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2022-08-14 10:29:05 +08:00
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status,
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2022-08-17 00:43:24 +08:00
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status & SDIO_IF_CMDCRCERR_Msk ? "CCRCFAIL " : "",
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status & SDIO_IF_DATCRCERR_Msk ? "DCRCFAIL " : "",
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status & SDIO_IF_CMDTIMEOUT_Msk ? "CTIMEOUT " : "",
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status & SDIO_IF_DATTIMEOUT_Msk ? "DTIMEOUT " : "",
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2022-08-14 10:29:05 +08:00
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status == 0 ? "NULL" : "",
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cmd->cmd_code,
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cmd->arg,
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0);
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}
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}
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else
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{
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cmd->err = RT_EOK;
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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}
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}
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/**
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* @brief This function transfer data by dma.
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* @param sdio swm_sdio_device
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* @param pkg sdio package
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* @retval None
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*/
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static void swm_sdio_transfer(struct swm_sdio_device *sdio, struct swm_sdio_pkg *pkg)
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{
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struct rt_mmcsd_data *data;
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int size;
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void *buff;
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if ((RT_NULL == pkg) || (RT_NULL == sdio))
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{
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LOG_E("swm_sdio_transfer invalid args");
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return;
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}
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data = pkg->cmd->data;
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if (RT_NULL == data)
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{
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LOG_E("swm_sdio_transfer invalid args");
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return;
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}
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buff = pkg->buff;
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if (RT_NULL == buff)
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{
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LOG_E("swm_sdio_transfer invalid args");
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return;
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}
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size = data->blks * data->blksize;
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if (data->flags & DATA_DIR_WRITE)
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{
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sdio->sdio_des.txconfig(pkg, (rt_uint32_t *)buff, size);
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}
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else if (data->flags & DATA_DIR_READ)
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{
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sdio->sdio_des.rxconfig(pkg, (rt_uint32_t *)buff, size);
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}
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}
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/**
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* @brief This function send command.
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* @param sdio swm_sdio_device
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* @param pkg sdio package
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* @retval None
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*/
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static void swm_sdio_send_command(struct swm_sdio_device *sdio, struct swm_sdio_pkg *pkg)
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{
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struct rt_mmcsd_cmd *cmd = pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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SDIO_TypeDef *swm_sdio = sdio->sdio_des.swm_sdio;
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rt_uint32_t reg_cmd;
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/* save pkg */
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sdio->pkg = pkg;
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LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d",
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cmd->cmd_code,
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cmd->arg,
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resp_type(cmd) == RESP_NONE ? "NONE" : "",
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resp_type(cmd) == RESP_R1 ? "R1" : "",
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resp_type(cmd) == RESP_R1B ? "R1B" : "",
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resp_type(cmd) == RESP_R2 ? "R2" : "",
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resp_type(cmd) == RESP_R3 ? "R3" : "",
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resp_type(cmd) == RESP_R4 ? "R4" : "",
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resp_type(cmd) == RESP_R5 ? "R5" : "",
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0);
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/* config cmd reg */
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reg_cmd = (cmd->cmd_code << SDIO_CMD_CMDINDX_Pos) |
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(0 << SDIO_CMD_CMDTYPE_Pos) |
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(0 << SDIO_CMD_IDXCHECK_Pos) |
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(0 << SDIO_CMD_CRCCHECK_Pos) |
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(0 << SDIO_CMD_DMAEN_Pos);
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if (resp_type(cmd) == RESP_NONE)
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reg_cmd |= SD_RESP_NO << SDIO_CMD_RESPTYPE_Pos;
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else if (resp_type(cmd) == RESP_R2)
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reg_cmd |= SD_RESP_128b << SDIO_CMD_RESPTYPE_Pos;
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else
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reg_cmd |= SD_RESP_32b << SDIO_CMD_RESPTYPE_Pos;
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/* config data reg */
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if (data != RT_NULL)
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{
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rt_uint32_t dir = 0;
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dir = (data->flags & DATA_DIR_READ) ? 1 : 0;
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swm_sdio->BLK = (data->blks << SDIO_BLK_COUNT_Pos) | (data->blksize << SDIO_BLK_SIZE_Pos);
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reg_cmd |= (1 << SDIO_CMD_HAVEDATA_Pos) |
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(dir << SDIO_CMD_DIRREAD_Pos) |
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((data->blks > 1) << SDIO_CMD_MULTBLK_Pos) |
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((data->blks > 1) << SDIO_CMD_BLKCNTEN_Pos) |
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(0 << SDIO_CMD_AUTOCMD12_Pos);
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}
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else
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{
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reg_cmd |= (0 << SDIO_CMD_HAVEDATA_Pos);
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}
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2022-08-17 00:43:24 +08:00
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/* send cmd */
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swm_sdio->ARG = cmd->arg;
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swm_sdio->CMD = reg_cmd;
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2022-08-14 10:29:05 +08:00
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/* transfer config */
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if (data != RT_NULL)
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{
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swm_sdio_transfer(sdio, pkg);
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}
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/* wait completed */
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swm_sdio_wait_completed(sdio);
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/* clear pkg */
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sdio->pkg = RT_NULL;
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}
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/**
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* @brief This function send sdio request.
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* @param sdio swm_sdio_device
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* @param req request
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* @retval None
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*/
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static void swm_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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struct swm_sdio_pkg pkg;
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struct swm_sdio_device *sdio = host->private_data;
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struct rt_mmcsd_data *data;
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RTHW_SDIO_LOCK(sdio);
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if (req->cmd != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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data = req->cmd->data;
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pkg.cmd = req->cmd;
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if (data != RT_NULL)
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{
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rt_uint32_t size = data->blks * data->blksize;
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RT_ASSERT(size <= SDIO_BUFF_SIZE);
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pkg.buff = data->buf;
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if ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1))
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{
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pkg.buff = cache_buf;
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if (data->flags & DATA_DIR_WRITE)
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{
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rt_memcpy(cache_buf, data->buf, size);
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}
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}
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}
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swm_sdio_send_command(sdio, &pkg);
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if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1)))
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{
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rt_memcpy(data->buf, cache_buf, data->blksize * data->blks);
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}
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}
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if (req->stop != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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pkg.cmd = req->stop;
|
|
|
|
swm_sdio_send_command(sdio, &pkg);
|
|
|
|
}
|
|
|
|
|
|
|
|
RTHW_SDIO_UNLOCK(sdio);
|
|
|
|
|
|
|
|
mmcsd_req_complete(sdio->host);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This function config sdio.
|
|
|
|
* @param host rt_mmcsd_host
|
|
|
|
* @param io_cfg rt_mmcsd_io_cfg
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void swm_sdio_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
|
|
|
|
{
|
|
|
|
rt_uint32_t clkcr, div, clk_src;
|
|
|
|
rt_uint32_t clk = io_cfg->clock;
|
|
|
|
struct swm_sdio_device *sdio = host->private_data;
|
|
|
|
SDIO_TypeDef *swm_sdio = sdio->sdio_des.swm_sdio;
|
|
|
|
|
|
|
|
clk_src = sdio->sdio_des.clk_get(sdio->sdio_des.swm_sdio);
|
|
|
|
if (clk_src < 400 * 1000)
|
|
|
|
{
|
|
|
|
LOG_E("The clock rate is too low! rata:%d", clk_src);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (clk > host->freq_max)
|
|
|
|
clk = host->freq_max;
|
|
|
|
|
|
|
|
if (clk > clk_src)
|
|
|
|
{
|
|
|
|
LOG_W("Setting rate is greater than clock source rate.");
|
|
|
|
clk = clk_src;
|
|
|
|
}
|
|
|
|
|
|
|
|
LOG_D("clk:%d width:%s%s%s power:%s%s%s",
|
|
|
|
clk,
|
|
|
|
io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
|
|
|
|
io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
|
|
|
|
io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
|
|
|
|
io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
|
|
|
|
io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
|
|
|
|
io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : "");
|
|
|
|
|
|
|
|
RTHW_SDIO_LOCK(sdio);
|
|
|
|
|
|
|
|
swm_sdio->CR1 = (1 << SDIO_CR1_CDSRC_Pos) | (7 << SDIO_CR1_VOLT_Pos);
|
|
|
|
if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
|
|
|
|
{
|
|
|
|
swm_sdio->CR1 |= (1 << SDIO_CR1_8BIT_Pos);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
swm_sdio->CR1 &= ~SDIO_CR1_8BIT_Msk;
|
|
|
|
if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
|
|
|
|
{
|
|
|
|
swm_sdio->CR1 |= (1 << SDIO_CR1_4BIT_Pos);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
swm_sdio->CR1 &= ~SDIO_CR1_4BIT_Msk;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
switch (io_cfg->power_mode)
|
|
|
|
{
|
|
|
|
case MMCSD_POWER_OFF:
|
|
|
|
swm_sdio->CR1 &= ~SDIO_CR1_PWRON_Msk;
|
|
|
|
break;
|
|
|
|
case MMCSD_POWER_UP:
|
|
|
|
case MMCSD_POWER_ON:
|
|
|
|
swm_sdio->CR1 |= (1 << SDIO_CR1_PWRON_Pos);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
LOG_W("unknown power_mode %d", io_cfg->power_mode);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
div = clk_src / clk;
|
|
|
|
if ((clk == 0) || (div == 0))
|
|
|
|
{
|
|
|
|
clkcr = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (div > 128)
|
|
|
|
clkcr = 0x80;
|
|
|
|
else if (div > 64)
|
|
|
|
clkcr = 0x40;
|
|
|
|
else if (div > 32)
|
|
|
|
clkcr = 0x20;
|
|
|
|
else if (div > 16)
|
|
|
|
clkcr = 0x10;
|
|
|
|
else if (div > 8)
|
|
|
|
clkcr = 0x08;
|
|
|
|
else if (div > 4)
|
|
|
|
clkcr = 0x04;
|
|
|
|
else if (div > 2)
|
|
|
|
clkcr = 0x02;
|
|
|
|
else if (div > 1)
|
|
|
|
clkcr = 0x01;
|
|
|
|
else
|
|
|
|
clkcr = 0x00;
|
|
|
|
}
|
|
|
|
|
|
|
|
SDIO->CR2 = (1 << SDIO_CR2_CLKEN_Pos) |
|
|
|
|
(1 << SDIO_CR2_SDCLKEN_Pos) |
|
|
|
|
(clkcr << SDIO_CR2_SDCLKDIV_Pos) |
|
|
|
|
(0xC << SDIO_CR2_TIMEOUT_Pos); // 2**25 SDIO_CLK
|
|
|
|
|
|
|
|
while ((SDIO->CR2 & SDIO_CR2_CLKRDY_Msk) == 0)
|
|
|
|
;
|
|
|
|
|
|
|
|
RTHW_SDIO_UNLOCK(sdio);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This function delect sdcard.
|
|
|
|
* @param host rt_mmcsd_host
|
|
|
|
* @retval 0x01
|
|
|
|
*/
|
|
|
|
static rt_int32_t swm_sdio_get_card_status(struct rt_mmcsd_host *host)
|
|
|
|
{
|
|
|
|
LOG_D("try to detect device");
|
|
|
|
return 0x01;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This function update sdio interrupt.
|
|
|
|
* @param host rt_mmcsd_host
|
|
|
|
* @param enable
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
void swm_sdio_enable_irq(struct rt_mmcsd_host *host, rt_int32_t enable)
|
|
|
|
{
|
|
|
|
struct swm_sdio_device *sdio = host->private_data;
|
|
|
|
SDIO_TypeDef *swm_sdio = sdio->sdio_des.swm_sdio;
|
|
|
|
|
|
|
|
if (enable)
|
|
|
|
{
|
|
|
|
LOG_D("enable sdio irq");
|
|
|
|
swm_sdio->IM = 0xFFFFFFFF;
|
|
|
|
swm_sdio->IE = 0xFFFF000F;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
LOG_D("disable sdio irq");
|
|
|
|
swm_sdio->IM &= ~0xFFFFFFFF;
|
|
|
|
swm_sdio->IE &= ~0xFFFFFFFF;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct rt_mmcsd_host_ops swm_sdio_ops =
|
|
|
|
{
|
|
|
|
.request = swm_sdio_request,
|
|
|
|
.set_iocfg = swm_sdio_set_iocfg,
|
|
|
|
.get_card_status = swm_sdio_get_card_status,
|
|
|
|
.enable_sdio_irq = swm_sdio_enable_irq,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct rt_mmcsd_host *swm_sdio_host_create(struct swm_sdio_des *sdio_des)
|
|
|
|
{
|
|
|
|
struct rt_mmcsd_host *host;
|
|
|
|
struct swm_sdio_device *sdio = RT_NULL;
|
|
|
|
|
|
|
|
if ((sdio_des == RT_NULL) || (sdio_des->txconfig == RT_NULL) || (sdio_des->rxconfig == RT_NULL))
|
|
|
|
{
|
|
|
|
LOG_E("L:%d F:%s %s %s %s",
|
|
|
|
(sdio_des == RT_NULL ? "sdio_des is NULL" : ""),
|
|
|
|
(sdio_des ? (sdio_des->txconfig ? "txconfig is NULL" : "") : ""),
|
|
|
|
(sdio_des ? (sdio_des->rxconfig ? "rxconfig is NULL" : "") : ""));
|
|
|
|
return RT_NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
sdio = rt_malloc(sizeof(struct swm_sdio_device));
|
|
|
|
if (sdio == RT_NULL)
|
|
|
|
{
|
|
|
|
LOG_E("L:%d F:%s malloc swm_sdio_device fail");
|
|
|
|
return RT_NULL;
|
|
|
|
}
|
|
|
|
rt_memset(sdio, 0, sizeof(struct swm_sdio_device));
|
|
|
|
|
|
|
|
host = mmcsd_alloc_host();
|
|
|
|
if (host == RT_NULL)
|
|
|
|
{
|
|
|
|
LOG_E("L:%d F:%s mmcsd alloc host fail");
|
|
|
|
rt_free(sdio);
|
|
|
|
return RT_NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct swm_sdio_des));
|
|
|
|
|
|
|
|
rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
|
|
|
|
rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO);
|
|
|
|
|
|
|
|
/* set host defautl attributes */
|
|
|
|
host->ops = &swm_sdio_ops;
|
|
|
|
host->freq_min = 400 * 1000;
|
|
|
|
host->freq_max = SDIO_MAX_FREQ;
|
|
|
|
host->valid_ocr = 0X00FFFF80; /* The voltage range supported is 1.65v-3.6v */
|
|
|
|
#ifndef SDIO_USING_1_BIT
|
|
|
|
host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
|
|
|
|
#else
|
|
|
|
host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
|
|
|
|
#endif
|
|
|
|
host->max_seg_size = SDIO_BUFF_SIZE;
|
|
|
|
host->max_dma_segs = 1;
|
|
|
|
host->max_blk_size = 512;
|
|
|
|
host->max_blk_count = 512;
|
|
|
|
|
|
|
|
/* link up host and sdio */
|
|
|
|
sdio->host = host;
|
|
|
|
host->private_data = sdio;
|
|
|
|
|
|
|
|
swm_sdio_enable_irq(host, 1);
|
|
|
|
|
|
|
|
/* ready to change */
|
|
|
|
mmcsd_change(host);
|
|
|
|
|
|
|
|
return host;
|
|
|
|
}
|
|
|
|
|
|
|
|
static rt_uint32_t swm_sdio_clock_get(SDIO_TypeDef *swm_sdio)
|
|
|
|
{
|
|
|
|
uint32_t prediv;
|
|
|
|
switch((SYS->CLKSEL & SYS_CLKSEL_SDIO_Msk) >> SYS_CLKSEL_SDIO_Pos)
|
|
|
|
{
|
|
|
|
case 0: prediv = 1; break;
|
|
|
|
case 1: prediv = 3; break;
|
|
|
|
case 2: prediv = 2; break;
|
|
|
|
case 3: prediv = 0; break;
|
|
|
|
}
|
|
|
|
return (SystemCoreClock / (1 << prediv));
|
|
|
|
}
|
|
|
|
|
|
|
|
static rt_err_t swm_sdio_rxconfig(struct swm_sdio_pkg *pkg, rt_uint32_t *buff, int size)
|
|
|
|
{
|
|
|
|
struct rt_mmcsd_cmd *cmd = pkg->cmd;
|
|
|
|
struct rt_mmcsd_data *data = cmd->data;
|
|
|
|
int offset = 0;
|
|
|
|
for (uint32_t i = 0; i < data->blks; i++)
|
|
|
|
{
|
|
|
|
offset = i* data->blksize / 4;
|
|
|
|
while ((SDIO->IF & SDIO_IF_BUFRDRDY_Msk) == 0)
|
|
|
|
__NOP();
|
|
|
|
SDIO->IF = SDIO_IF_BUFRDRDY_Msk;
|
|
|
|
for (uint32_t j = 0; j < data->blksize / 4; j++)
|
|
|
|
{
|
|
|
|
buff[offset + j] = SDIO->DATA;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static rt_err_t swm_sdio_txconfig(struct swm_sdio_pkg *pkg, rt_uint32_t *buff, int size)
|
|
|
|
{
|
|
|
|
struct rt_mmcsd_cmd *cmd = pkg->cmd;
|
|
|
|
struct rt_mmcsd_data *data = cmd->data;
|
|
|
|
int offset = 0;
|
|
|
|
for (uint32_t i = 0; i < data->blks; i++)
|
|
|
|
{
|
|
|
|
offset = i* data->blksize / 4;
|
|
|
|
while ((SDIO->IF & SDIO_IF_BUFWRRDY_Msk) == 0)
|
|
|
|
__NOP();
|
|
|
|
SDIO->IF = SDIO_IF_BUFWRRDY_Msk;
|
|
|
|
for (uint32_t j = 0; j < data->blksize / 4; j++)
|
|
|
|
{
|
|
|
|
SDIO->DATA = buff[offset + j];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This function interrupt process function.
|
|
|
|
* @param host rt_mmcsd_host
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void swm_sdio_irq_process(struct rt_mmcsd_host *host)
|
|
|
|
{
|
|
|
|
int complete = 0;
|
|
|
|
struct swm_sdio_device *sdio = host->private_data;
|
|
|
|
SDIO_TypeDef *swm_sdio = sdio->sdio_des.swm_sdio;
|
|
|
|
rt_uint32_t intstatus = swm_sdio->IF;
|
|
|
|
|
|
|
|
if (intstatus & SDIO_IF_ERROR_Msk)
|
|
|
|
{
|
|
|
|
swm_sdio->IF = 0xFFFFFFFF;
|
|
|
|
complete = 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (intstatus & SDIO_IF_CMDDONE_Msk)
|
|
|
|
{
|
|
|
|
swm_sdio->IF = SDIO_IF_CMDDONE_Msk;
|
|
|
|
if (sdio->pkg != RT_NULL)
|
|
|
|
{
|
|
|
|
if (!sdio->pkg->cmd->data)
|
|
|
|
{
|
|
|
|
complete = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (intstatus & SDIO_IF_TRXDONE_Msk)
|
|
|
|
{
|
|
|
|
swm_sdio->IF = SDIO_IF_TRXDONE_Msk;
|
|
|
|
complete = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (complete)
|
|
|
|
{
|
|
|
|
rt_event_send(&sdio->event, intstatus);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void SDIO_Handler(void)
|
|
|
|
{
|
|
|
|
/* enter interrupt */
|
|
|
|
rt_interrupt_enter();
|
|
|
|
/* Process All SDIO Interrupt Sources */
|
|
|
|
swm_sdio_irq_process(host);
|
|
|
|
/* leave interrupt */
|
|
|
|
rt_interrupt_leave();
|
|
|
|
}
|
|
|
|
|
|
|
|
int swm_sdio_init(void)
|
|
|
|
{
|
|
|
|
int result = RT_EOK;
|
|
|
|
|
|
|
|
struct swm_sdio_des sdio_des;
|
|
|
|
|
|
|
|
PORT_Init(PORTM, PIN2, PORTM_PIN2_SD_CLK, 0);
|
|
|
|
PORT_Init(PORTM, PIN4, PORTM_PIN4_SD_CMD, 1);
|
|
|
|
PORT_Init(PORTM, PIN5, PORTM_PIN5_SD_D0, 1);
|
|
|
|
PORT_Init(PORTM, PIN6, PORTM_PIN6_SD_D1, 1);
|
|
|
|
PORT_Init(PORTN, PIN0, PORTN_PIN0_SD_D2, 1);
|
|
|
|
PORT_Init(PORTN, PIN1, PORTN_PIN1_SD_D3, 1);
|
|
|
|
|
|
|
|
NVIC_EnableIRQ(SDIO_IRQn);
|
|
|
|
SYS->CLKSEL &= ~SYS_CLKSEL_SDIO_Msk;
|
|
|
|
if (SystemCoreClock > 80000000) //SDIO时钟需要小于52MHz
|
|
|
|
SYS->CLKSEL |= (2 << SYS_CLKSEL_SDIO_Pos); //SDCLK = SYSCLK / 4
|
|
|
|
else
|
2022-08-17 00:43:24 +08:00
|
|
|
SYS->CLKSEL |= (0 << SYS_CLKSEL_SDIO_Pos); //SDCLK = SYSCLK / 2
|
2022-08-14 10:29:05 +08:00
|
|
|
|
|
|
|
SYS->CLKEN0 |= (0x01 << SYS_CLKEN0_SDIO_Pos);
|
|
|
|
|
|
|
|
SDIO->CR2 = (1 << SDIO_CR2_RSTALL_Pos);
|
|
|
|
|
|
|
|
NVIC_EnableIRQ(SDIO_IRQn);
|
|
|
|
sdio_des.clk_get = swm_sdio_clock_get;
|
|
|
|
sdio_des.swm_sdio = SDIO;
|
|
|
|
sdio_des.rxconfig = swm_sdio_rxconfig;
|
|
|
|
sdio_des.txconfig = swm_sdio_txconfig;
|
|
|
|
|
|
|
|
host = swm_sdio_host_create(&sdio_des);
|
|
|
|
if (host == RT_NULL)
|
|
|
|
{
|
|
|
|
LOG_E("host create fail.");
|
|
|
|
result = -1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
LOG_D("host create success.");
|
|
|
|
result = 0;
|
|
|
|
}
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
INIT_DEVICE_EXPORT(swm_sdio_init);
|
|
|
|
|
|
|
|
#endif /* BSP_USING_SDIO */
|
|
|
|
#endif /* RT_USING_SDIO */
|