206 lines
9.4 KiB
C
206 lines
9.4 KiB
C
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/*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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/******************************************************************************/
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/** \file hc32f460_emb.h
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**
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** A detailed description is available at
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** @link EMBGroup EMB description @endlink
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**
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** - 2018-11-24 CDT First version for Device Driver Library of EMB.
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**
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******************************************************************************/
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#ifndef __HC32F460_EMB_H__
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#define __HC32F460_EMB_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_common.h"
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#include "ddl_config.h"
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#if (DDL_EMB_ENABLE == DDL_ON)
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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*******************************************************************************
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** \defgroup EMBGroup Emergency Brake(EMB)
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**
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******************************************************************************/
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//@{
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief EMB status enumeration
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******************************************************************************/
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typedef enum en_emb_status
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{
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EMBFlagPortIn = 0u, ///< EMB port in brake flag
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EMBFlagPWMSame = 1u, ///< EMB PWM same brake flag
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EMBFlagCmp = 2u, ///< EMB CMP brake flag
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EMBFlagOSCFail = 3u, ///< EMB oscillator fail brake flag
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EMBPortInState = 4u, ///< EMB port in state
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EMBPWMState = 5u, ///< EMB PWM same state
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} en_emb_status_t;
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/**
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*******************************************************************************
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** \brief EMB status clear(recover) enumeration
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******************************************************************************/
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typedef enum en_emb_status_clr
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{
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EMBPortInFlagClr = 0u, ///< EMB port in brake flag clear
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EMBPWMSameFlagCLr = 1u, ///< EMB PWM same brake flag clear
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EMBCmpFlagClr = 2u, ///< EMB CMP brake flag clear
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EMBOSCFailFlagCLr = 3u, ///< EMB oscillator fail brake flag clear
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} en_emb_status_clr_t;
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/**
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*******************************************************************************
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** \brief EMB irq enumeration
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******************************************************************************/
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typedef enum en_emb_irq_type
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{
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PORTBrkIrq = 0u, ///< EMB port brake interrupt
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PWMSmBrkIrq = 1u, ///< EMB PWM same brake interrupt
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CMPBrkIrq = 2u, ///< EMB CMP brake interrupt
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OSCFailBrkIrq = 3u, ///< EMB oscillator fail brake interrupt
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} en_emb_irq_type_t;
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/**
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*******************************************************************************
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** \brief EMB port in filter enumeration
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******************************************************************************/
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typedef enum en_emb_port_filter
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{
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EMBPortFltDiv0 = 0u, ///< EMB port in filter with PCLK clock
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EMBPortFltDiv8 = 1u, ///< EMB port in filter with PCLK/8 clock
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EMBPortFltDiv32 = 2u, ///< EMB port in filter with PCLK/32 clock
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EMBPortFltDiv128 = 3u, ///< EMB port in filter with PCLK/128 clock
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} en_emb_port_filter_t;
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/**
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*******************************************************************************
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** \brief EMB CR0 for timer6 config
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** \note
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******************************************************************************/
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typedef struct stc_emb_ctrl_timer6
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{
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bool bEnPortBrake; ///< Enable port brake
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bool bEnCmp1Brake; ///< Enable CMP1 brake
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bool bEnCmp2Brake; ///< Enable CMP2 brake
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bool bEnCmp3Brake; ///< Enable CMP3 brake
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bool bEnOSCFailBrake; ///< Enable OSC fail brake
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bool bEnTimer61PWMSBrake; ///< Enable tiemr61 PWM same brake
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bool bEnTimer62PWMSBrake; ///< Enable tiemr62 PWM same brake
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bool bEnTimer63PWMSBrake; ///< Enable tiemr63 PWM same brake
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en_emb_port_filter_t enPortInFltClkSel; ///< Port in filter clock selection
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bool bEnPorInFlt; ///< Enable port in filter
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bool bEnPortInLevelSel_Low; ///< Poit input active level 1: LowLevel 0:HighLevel
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}stc_emb_ctrl_timer6_t;
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/**
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*******************************************************************************
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** \brief EMB CR1~3 for timer4x config
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** \note
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******************************************************************************/
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typedef struct stc_emb_ctrl_timer4
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{
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bool bEnPortBrake; ///< Enable port brake
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bool bEnCmp1Brake; ///< Enable CMP1 brake
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bool bEnCmp2Brake; ///< Enable CMP2 brake
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bool bEnCmp3Brake; ///< Enable CMP3 brake
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bool bEnOSCFailBrake; ///< Enable OS fail brake
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bool bEnTimer4xWHLSammeBrake; ///< Enable tiemr4x PWM WH WL same brake
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bool bEnTimer4xVHLSammeBrake; ///< Enable tiemr4x PWM VH VL same brake
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bool bEnTimer4xUHLSammeBrake; ///< Enable tiemr4x PWM UH UL same brake
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en_emb_port_filter_t enPortInFltClkSel; ///< Port in filter clock selection
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bool bEnPorInFlt; ///< Enable port in filter
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bool bEnPortInLevelSel_Low; ///< Poit input active level 1: LowLevel 0:HighLevel
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}stc_emb_ctrl_timer4_t;
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/**
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*******************************************************************************
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** \brief EMB PWM level detect timer6 config
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** \note
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******************************************************************************/
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typedef struct stc_emb_pwm_level_timer6
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{
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bool bEnTimer61HighLevelDect; ///< Enable tiemr61 active detected level 1:HighLevel 0:LowLevel
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bool bEnTimer62HighLevelDect; ///< Enable tiemr62 active detected level 1:HighLevel 0:LowLevel
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bool bEnTimer63HighLevelDect; ///< Enable tiemr63 active detected level 1:HighLevel 0:LowLevel
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}stc_emb_pwm_level_timer6_t;
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/**
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*******************************************************************************
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** \brief EMB PWM level detect timer4x config
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** \note
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******************************************************************************/
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typedef struct stc_emb_pwm_level_timer4
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{
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bool bEnUHLPhaseHighLevelDect; ///< Enable tiemr4x UH UL active detected level 1:HighLevel 0:LowLevel
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bool bEnVHLPhaseHighLevelDect; ///< Enable tiemr4x VH VL active detected level 1:HighLevel 0:LowLevel
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bool bEnWHLphaseHighLevelDect; ///< Enable tiemr4x WH WL active detected level 1:HighLevel 0:LowLevel
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}stc_emb_pwm_level_timer4_t;
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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/* IRQ config */
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en_result_t EMB_ConfigIrq(M4_EMB_TypeDef *EMBx,
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en_emb_irq_type_t enEMBIrq,
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bool bEn);
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/* Get status(flag) */
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bool EMB_GetStatus(M4_EMB_TypeDef *EMBx, en_emb_status_t enStatus);
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/* Status(flag) clear (recover) */
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en_result_t EMB_ClrStatus(M4_EMB_TypeDef *EMBx,
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en_emb_status_clr_t enStatusClr);
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/* Control Register(CTL) config for timer6 */
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en_result_t EMB_Config_CR_Timer6(const stc_emb_ctrl_timer6_t* pstcEMBConfigCR);
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/* Control Register(CTL) config for timer4 */
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en_result_t EMB_Config_CR_Timer4(M4_EMB_TypeDef *EMBx,
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const stc_emb_ctrl_timer4_t* pstcEMBConfigCR);
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/* PWM level detect (short detection) selection config for timer6 */
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en_result_t EMB_PWMLv_Timer6(const stc_emb_pwm_level_timer6_t* pstcEMBPWMlv);
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/* PWM level detect (short detection) selection config for timer4 */
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en_result_t EMB_PWMLv_Timer4(M4_EMB_TypeDef *EMBx,
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const stc_emb_pwm_level_timer4_t* pstcEMBPWMlv);
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/* Software brake */
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en_result_t EMB_SwBrake(M4_EMB_TypeDef *EMBx, bool bEn);
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//@} // EMBGroup
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#ifdef __cplusplus
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}
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#endif
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#endif /* DDL_EMB_ENABLE */
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#endif /* __HC32F460_EMB_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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