260 lines
6.2 KiB
C
260 lines
6.2 KiB
C
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/**
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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******************************************************************************
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* @file interrupt.c
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* @version V0.1
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* @brief interrupt interface for rt-thread
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*
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* Change Logs:
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* Date Author Notes
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* 2019-05-08 Cliff.Chen first implementation
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*
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******************************************************************************
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*/
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#include <rthw.h>
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#include "hal_base.h"
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#if defined(ARCH_ARM_CORTEX_M0) || defined(ARCH_ARM_CORTEX_M3) || defined(ARCH_ARM_CORTEX_M4) || defined(ARCH_ARM_CORTEX_M7)
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#if EXT_INTERRUPT
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struct rk_intc
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{
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void *intc_base;
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rt_isr_handler_t irq_handler;
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};
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static rt_isr_handler_t ext_vector[NUM_EXT_INTERRUPTS];
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static void intc_irq_dispatch(void *intc, uint32_t offset)
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{
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uint32_t i, irq_no;
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for (i = 0; i < NUM_EXT_INTERRUPTS; i++)
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{
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if (HAL_INTC_GetFinalStatus(intc, i))
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{
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irq_no = i + offset * NUM_INT_PER_CONTROLLER;
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ext_vector[irq_no](NUM_INTERRUPTS + irq_no, NULL);
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}
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}
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}
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#define DEFINE_RK_INTC_IRQ(ID) \
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static void rk_intc##ID##_irq_dispatch(int irq, void *param); \
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static struct rk_intc rk_intc##ID = \
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{ \
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.intc_base = INTC##ID, \
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.irq_handler = rk_intc##ID##_irq_dispatch, \
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}; \
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static void rk_intc##ID##_irq_dispatch(int irq, void *param) \
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{ \
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intc_irq_dispatch(INTC##ID, ID); \
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}
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#ifdef INTC0
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DEFINE_RK_INTC_IRQ(0);
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#endif
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#ifdef INTC1
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DEFINE_RK_INTC_IRQ(1);
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#endif
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#ifdef INTC2
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DEFINE_RK_INTC_IRQ(2);
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#endif
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#ifdef INTC3
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DEFINE_RK_INTC_IRQ(3);
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#endif
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static struct rk_intc *rk_intc_table[] =
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{
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#ifdef INTC0
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&rk_intc0,
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#endif
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#ifdef INTC1
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&rk_intc1,
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#endif
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#ifdef INTC2
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&rk_intc2,
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#endif
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#ifdef INTC3
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&rk_intc3,
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#endif
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};
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static void rk_intc_init(void)
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{
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uint32_t i;
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memset(ext_vector, 0, sizeof(ext_vector));
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for (i = 0; i < HAL_ARRAY_SIZE(rk_intc_table); i++)
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{
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HAL_NVIC_SetIRQHandler(INTC0_IRQn + i, (NVIC_IRQHandler)rk_intc_table[i]->irq_handler);
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HAL_NVIC_EnableIRQ(INTC0_IRQn + i);
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HAL_INTC_EnableAllRQ(rk_intc_table[i]->intc_base);
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}
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}
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static void rk_intc_mask(uint32_t vector)
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{
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uint32_t intc, irq;
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if (vector >= TOTAL_INTERRUPTS)
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return;
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if (vector < NUM_INTERRUPTS)
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HAL_NVIC_DisableIRQ(vector);
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else
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{
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intc = (vector - NUM_INTERRUPTS) / NUM_INT_PER_CONTROLLER;
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irq = (vector - NUM_INTERRUPTS) % NUM_INT_PER_CONTROLLER;
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if (intc >= HAL_ARRAY_SIZE(rk_intc_table))
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return;
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HAL_INTC_MaskIRQ(rk_intc_table[intc]->intc_base, irq);
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}
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}
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static void rk_intc_unmask(uint32_t vector)
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{
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uint32_t intc, irq;
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if (vector >= TOTAL_INTERRUPTS)
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return;
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if (vector < NUM_INTERRUPTS)
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HAL_NVIC_EnableIRQ(vector);
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else
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{
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intc = (vector - NUM_INTERRUPTS) / NUM_INT_PER_CONTROLLER;
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irq = (vector - NUM_INTERRUPTS) % NUM_INT_PER_CONTROLLER;
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if (intc >= HAL_ARRAY_SIZE(rk_intc_table))
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return;
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HAL_INTC_UnmaskIRQ(rk_intc_table[intc]->intc_base, irq);
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}
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}
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#endif /* end of EXT_INTERRUPT */
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#ifdef RT_USING_PROF_IRQ
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#define IRQ_AVG_COUNT 200
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struct irq_summry
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{
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uint32_t count;
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uint32_t start;
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uint32_t time_total;
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uint32_t time_avg;
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uint32_t time_max;
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};
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static struct irq_summry g_irq_prof[TOTAL_INTERRUPTS];
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static void irq_enter_hook(void)
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{
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uint32_t irq;
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irq = __get_IPSR() - 16;
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g_irq_prof[irq].count++;
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g_irq_prof[irq].start = HAL_TIMER_GetCount(SYS_TIMER);
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}
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static void irq_leave_hook(void)
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{
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uint32_t time_cur, end, irq;
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irq = __get_IPSR() - 16;
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end = HAL_TIMER_GetCount(SYS_TIMER);
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if (end < g_irq_prof[irq].start)
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end += PLL_INPUT_OSC_RATE;
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time_cur = end - g_irq_prof[irq].start;
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g_irq_prof[irq].time_total += time_cur;
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g_irq_prof[irq].time_max =
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g_irq_prof[irq].time_max > time_cur ? g_irq_prof[irq].time_max : time_cur;
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if (g_irq_prof[irq].count > 0 &&
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g_irq_prof[irq].count % IRQ_AVG_COUNT == 0)
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{
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g_irq_prof[irq].time_avg = g_irq_prof[irq].time_total / IRQ_AVG_COUNT;
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g_irq_prof[irq].time_total = 0;
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}
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}
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static void dump_irq_summry(int argc, char **argv)
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{
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uint32_t i;
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rt_kprintf("IRQ COUNT AVG MAX\n");
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for (i = 0; i < NUM_INTERRUPTS; i++)
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{
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rt_kprintf("%03d %08d %08d %08d\n", i, g_irq_prof[i].count,
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g_irq_prof[i].time_avg,
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g_irq_prof[i].time_max);
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}
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}
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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MSH_CMD_EXPORT(dump_irq_summry, dump irq summry);
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#endif
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#endif /* end of RT_USING_PROF_IRQ */
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void rt_hw_interrupt_init(void)
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{
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uint32_t i;
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for (i = 0; i < NUM_INTERRUPTS; i++)
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{
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HAL_NVIC_SetPriority(i, NVIC_PERIPH_PRIO_DEFAULT, NVIC_PERIPH_SUB_PRIO_DEFAULT);
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}
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#if EXT_INTERRUPT
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rk_intc_init();
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#endif
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#ifdef RT_USING_PROF_IRQ
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rt_interrupt_enter_sethook(irq_enter_hook);
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rt_interrupt_leave_sethook(irq_leave_hook);
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#endif
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}
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void rt_hw_interrupt_mask(int vector)
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{
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#if EXT_INTERRUPT
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rk_intc_mask(vector);
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#else
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HAL_NVIC_DisableIRQ(vector);
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#endif
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}
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void rt_hw_interrupt_umask(int vector)
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{
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#if EXT_INTERRUPT
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rk_intc_unmask(vector);
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#else
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HAL_NVIC_EnableIRQ(vector);
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#endif
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}
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rt_isr_handler_t rt_hw_interrupt_install(int vector,
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rt_isr_handler_t handler,
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void *param,
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const char *name)
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{
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#if EXT_INTERRUPT
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if (vector < NUM_INTERRUPTS)
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HAL_NVIC_SetIRQHandler(vector, (NVIC_IRQHandler)handler);
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else
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ext_vector[vector - NUM_INTERRUPTS] = handler;
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#else
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HAL_NVIC_SetIRQHandler(vector, (NVIC_IRQHandler)handler);
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#endif
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return handler;
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}
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#endif /* end of defined(ARCH_ARM_CORTEX_M0) || defined(ARCH_ARM_CORTEX_M3) || defined(ARCH_ARM_CORTEX_M4) || defined(ARCH_ARM_CORTEX_M7) */
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