2020-12-10 11:02:26 +08:00
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/*
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2020-12-10 17:13:11 +08:00
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* Copyright (c) 2020-2020, Bluetrum Development Team
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2020-12-10 11:02:26 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020/11/18 greedyhao The first version.
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*/
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#include "ab32vg1.h"
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.global rt_interrupt_from_thread
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.global rt_interrupt_to_thread
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.global rt_cur_thread_sp
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2020-12-30 17:43:23 +08:00
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.global rt_thread_switch_interrupt_flag
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2020-12-10 11:02:26 +08:00
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.global rt_interrupt_nest
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/*
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* rt_base_t rt_hw_interrupt_disable();
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* a0 -> return
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*/
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.global rt_hw_interrupt_disable
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rt_hw_interrupt_disable:
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lw a5, PICCON(zero)
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mv a0, a5
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andi a5, a5, -2
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sw a5, PICCON(zero)
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ret
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/*
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* void rt_hw_interrupt_enable(rt_base_t level);
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* a0 -> level
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*/
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.global rt_hw_interrupt_enable
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rt_hw_interrupt_enable:
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andi a0, a0, 1
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beqz a0,enable_int_ret
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lw a5, PICCON(zero)
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ori a5, a5, 1
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sw a5,PICCON(zero)
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enable_int_ret:
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ret
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/* Macro for saving task context */
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.macro save_context
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2020-12-25 17:19:58 +08:00
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addi sp, sp, -124
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2020-12-10 11:02:26 +08:00
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/* Save Context */
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sw x1, 0(sp)
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sw x4, 4(sp)
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sw x5, 8(sp)
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sw x6, 12(sp)
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sw x7, 16(sp)
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sw x8, 20(sp)
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sw x9, 24(sp)
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sw x10, 28(sp)
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sw x11, 32(sp)
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sw x12, 36(sp)
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sw x13, 40(sp)
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sw x14, 44(sp)
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sw x15, 48(sp)
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sw x16, 52(sp)
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sw x17, 56(sp)
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sw x18, 60(sp)
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sw x19, 64(sp)
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sw x20, 68(sp)
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sw x21, 72(sp)
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sw x22, 76(sp)
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sw x23, 80(sp)
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sw x24, 84(sp)
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sw x25, 88(sp)
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sw x26, 92(sp)
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sw x27, 96(sp)
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sw x28, 100(sp)
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sw x29, 104(sp)
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sw x30, 108(sp)
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sw x31, 112(sp)
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2020-12-30 17:43:23 +08:00
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lw a5, EPC(zero) //Saves current program counter (EPC) as task program counter
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2020-12-10 11:02:26 +08:00
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sw a5, 116(sp)
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2020-12-25 17:19:58 +08:00
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lw a5, EPICCON(zero)
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sw a5, 120(sp)
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2020-12-10 11:02:26 +08:00
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2020-12-30 17:43:23 +08:00
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sw sp, rt_cur_thread_sp, a4 //store sp in preempted tasks tcb
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2020-12-10 11:02:26 +08:00
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.endm
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/* Macro for restoring task context */
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.macro restore_context
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la a5, rt_cur_thread_sp
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2020-12-30 17:43:23 +08:00
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lw sp, 0(a5) //get new task stack pointer
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2020-12-10 11:02:26 +08:00
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/* Load task program counter EPC*/
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lw a5, 116(sp)
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sw a5, EPC(zero)
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2020-12-25 17:19:58 +08:00
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lw a5, 120(sp)
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sw a5, EPICCON(zero)
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2020-12-10 11:02:26 +08:00
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/* Restore registers,
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Skip global pointer because that does not change */
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lw x1, 0(sp)
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lw x4, 4(sp)
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lw x5, 8(sp)
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lw x6, 12(sp)
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lw x7, 16(sp)
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lw x8, 20(sp)
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lw x9, 24(sp)
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lw x10, 28(sp)
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lw x11, 32(sp)
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lw x12, 36(sp)
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lw x13, 40(sp)
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lw x14, 44(sp)
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lw x15, 48(sp)
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lw x16, 52(sp)
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lw x17, 56(sp)
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lw x18, 60(sp)
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lw x19, 64(sp)
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lw x20, 68(sp)
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lw x21, 72(sp)
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lw x22, 76(sp)
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lw x23, 80(sp)
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lw x24, 84(sp)
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lw x25, 88(sp)
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lw x26, 92(sp)
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lw x27, 96(sp)
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lw x28, 100(sp)
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lw x29, 104(sp)
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lw x30, 108(sp)
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lw x31, 112(sp)
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2020-12-25 17:19:58 +08:00
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addi sp, sp, 124
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2020-12-10 11:02:26 +08:00
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mret
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.endm
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/*
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* void rt_hw_context_switch_to(rt_uint32 to);
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* r0 --> to
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*/
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.globl rt_hw_context_switch_to
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rt_hw_context_switch_to:
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2020-12-30 17:43:23 +08:00
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sw zero, rt_interrupt_from_thread, a4 /*set from thread to 0*/
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sw a0, rt_interrupt_to_thread, a4 /*set rt_interrupt_to_thread*/
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2020-12-10 11:02:26 +08:00
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2020-12-30 17:43:23 +08:00
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sb zero, rt_interrupt_nest, a4 /*rt_interrupt_nest = 0*/
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2020-12-10 11:02:26 +08:00
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li a5, 1
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2020-12-30 17:43:23 +08:00
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sw a5, rt_thread_switch_interrupt_flag, a4 // rt_thread_switch_interrupt_flag = 1;
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2020-12-10 11:02:26 +08:00
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SWINT /*kick soft interrupt*/
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2020-12-30 17:43:23 +08:00
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lw a5, PICCON(zero) /*enable interrupt*/
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2020-12-10 11:02:26 +08:00
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ori a5, a5, 1
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sw a5, PICCON(zero)
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ret
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/*
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* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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* a0 --> from
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* a1 --> to
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*/
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.globl rt_hw_context_switch
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rt_hw_context_switch:
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2020-12-30 17:43:23 +08:00
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sw a0, rt_interrupt_from_thread, a4 /*set rt_interrupt_from_thread*/
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2020-12-10 11:02:26 +08:00
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sw a1, rt_interrupt_to_thread, a4 /*set rt_interrupt_to_thread*/
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li a5, 1
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2020-12-30 17:43:23 +08:00
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sw a5, rt_thread_switch_interrupt_flag, a4 /*rt_thread_switch_interrupt_flag = 1*/
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2020-12-10 11:02:26 +08:00
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SWINT /*kick soft interrupt*/
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ret
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/*
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* void rt_switch_to_thread(void);
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* r0 --> to
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*/
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.globl rt_switch_to_thread
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rt_switch_to_thread:
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lw a0, rt_interrupt_from_thread
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lw a5, rt_cur_thread_sp
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sw a5, 0(a0)
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lw a0, rt_interrupt_to_thread
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lw a5, 0(a0)
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sw a5, rt_cur_thread_sp, a4
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ret
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/*
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* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
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* a0 --> from
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* a1 --> to
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*/
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.global rt_hw_context_switch_interrupt
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rt_hw_context_switch_interrupt:
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2020-12-30 17:43:23 +08:00
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lw a5, rt_thread_switch_interrupt_flag
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2020-12-10 11:02:26 +08:00
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bnez a5, _reswitch
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li a5, 0x01
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2020-12-30 17:43:23 +08:00
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sw a5, rt_thread_switch_interrupt_flag, a4
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sw a0, rt_interrupt_from_thread, a4 /*set rt_interrupt_from_thread*/
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2020-12-10 11:02:26 +08:00
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_reswitch:
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2020-12-30 17:43:23 +08:00
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sw a1, rt_interrupt_to_thread, a4 /*set rt_interrupt_to_thread*/
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2020-12-10 11:02:26 +08:00
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ret
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//软中断服务
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.global rt_soft_isr
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rt_soft_isr:
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2020-12-30 17:43:23 +08:00
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li a5, 0x4 // PICPND = BIT(IRQ_SW_VECTOR); 清软中断Pending
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2020-12-10 11:02:26 +08:00
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sw a5, PICPND(zero)
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ret
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.globl low_prio_irq
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low_prio_irq:
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save_context
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2020-12-30 17:43:23 +08:00
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lw a5, rt_interrupt_nest
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bnez a5, _low_prio_irq_exit
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2020-12-10 11:02:26 +08:00
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lw a5, cpu_irq_comm_hook
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jalr a5
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2020-12-30 17:43:23 +08:00
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lw a5, rt_thread_switch_interrupt_flag
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beqz a5, _low_prio_irq_exit // if (rt_thread_switch_interrupt_flag)
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2020-12-10 11:02:26 +08:00
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jal rt_switch_to_thread
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2020-12-30 17:43:23 +08:00
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sw zero, rt_thread_switch_interrupt_flag, a4 // rt_thread_switch_interrupt_flag = 0;
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2020-12-10 11:02:26 +08:00
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_low_prio_irq_exit:
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restore_context
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