558 lines
20 KiB
C
558 lines
20 KiB
C
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/***************************************************************************//**
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* @file
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* @brief Analog to Digital Converter (ADC) peripheral API for EFM32.
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* @author Energy Micro AS
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* @version 1.3.0
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#ifndef __EFM32_ADC_H
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#define __EFM32_ADC_H
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#include <stdbool.h>
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#include "efm32.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************************************************************//**
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* @addtogroup EFM32_Library
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup ADC
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* @{
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******************************************************************************/
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/*******************************************************************************
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******************************** ENUMS ************************************
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******************************************************************************/
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/** Acquisition time (in ADC clock cycles). */
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typedef enum
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{
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adcAcqTime1 = _ADC_SINGLECTRL_AT_1CYCLE, /**< 1 clock cycle. */
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adcAcqTime2 = _ADC_SINGLECTRL_AT_2CYCLES, /**< 2 clock cycles. */
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adcAcqTime4 = _ADC_SINGLECTRL_AT_4CYCLES, /**< 4 clock cycles. */
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adcAcqTime8 = _ADC_SINGLECTRL_AT_8CYCLES, /**< 8 clock cycles. */
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adcAcqTime16 = _ADC_SINGLECTRL_AT_16CYCLES, /**< 16 clock cycles. */
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adcAcqTime32 = _ADC_SINGLECTRL_AT_32CYCLES, /**< 32 clock cycles. */
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adcAcqTime64 = _ADC_SINGLECTRL_AT_64CYCLES, /**< 64 clock cycles. */
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adcAcqTime128 = _ADC_SINGLECTRL_AT_128CYCLES, /**< 128 clock cycles. */
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adcAcqTime256 = _ADC_SINGLECTRL_AT_256CYCLES /**< 256 clock cycles. */
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} ADC_AcqTime_TypeDef;
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/** Lowpass filter mode. */
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typedef enum
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{
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/** No filter or decoupling capacitor. */
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adcLPFilterBypass = _ADC_CTRL_LPFMODE_BYPASS,
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/** On-chip RC filter. */
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adcLPFilterRC = _ADC_CTRL_LPFMODE_RCFILT,
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/** On-chip decoupling capacitor. */
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adcLPFilterDeCap = _ADC_CTRL_LPFMODE_DECAP
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} ADC_LPFilter_TypeDef;
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/** Oversample rate select. */
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typedef enum
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{
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/** 2 samples per conversion result. */
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adcOvsRateSel2 = _ADC_CTRL_OVSRSEL_X2,
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/** 4 samples per conversion result. */
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adcOvsRateSel4 = _ADC_CTRL_OVSRSEL_X4,
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/** 8 samples per conversion result. */
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adcOvsRateSel8 = _ADC_CTRL_OVSRSEL_X8,
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/** 16 samples per conversion result. */
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adcOvsRateSel16 = _ADC_CTRL_OVSRSEL_X16,
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/** 32 samples per conversion result. */
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adcOvsRateSel32 = _ADC_CTRL_OVSRSEL_X32,
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/** 64 samples per conversion result. */
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adcOvsRateSel64 = _ADC_CTRL_OVSRSEL_X64,
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/** 128 samples per conversion result. */
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adcOvsRateSel128 = _ADC_CTRL_OVSRSEL_X128,
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/** 256 samples per conversion result. */
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adcOvsRateSel256 = _ADC_CTRL_OVSRSEL_X256,
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/** 512 samples per conversion result. */
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adcOvsRateSel512 = _ADC_CTRL_OVSRSEL_X512,
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/** 1024 samples per conversion result. */
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adcOvsRateSel1024 = _ADC_CTRL_OVSRSEL_X1024,
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/** 2048 samples per conversion result. */
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adcOvsRateSel2048 = _ADC_CTRL_OVSRSEL_X2048,
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/** 4096 samples per conversion result. */
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adcOvsRateSel4096 = _ADC_CTRL_OVSRSEL_X4096
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} ADC_OvsRateSel_TypeDef;
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/** Peripheral Reflex System signal used to trigger single sample. */
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typedef enum
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{
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adcPRSSELCh0 = _ADC_SINGLECTRL_PRSSEL_PRSCH0, /**< PRS channel 0. */
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adcPRSSELCh1 = _ADC_SINGLECTRL_PRSSEL_PRSCH1, /**< PRS channel 1. */
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adcPRSSELCh2 = _ADC_SINGLECTRL_PRSSEL_PRSCH2, /**< PRS channel 2. */
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adcPRSSELCh3 = _ADC_SINGLECTRL_PRSSEL_PRSCH3, /**< PRS channel 3. */
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adcPRSSELCh4 = _ADC_SINGLECTRL_PRSSEL_PRSCH4, /**< PRS channel 4. */
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adcPRSSELCh5 = _ADC_SINGLECTRL_PRSSEL_PRSCH5, /**< PRS channel 5. */
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adcPRSSELCh6 = _ADC_SINGLECTRL_PRSSEL_PRSCH6, /**< PRS channel 6. */
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adcPRSSELCh7 = _ADC_SINGLECTRL_PRSSEL_PRSCH7 /**< PRS channel 7. */
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} ADC_PRSSEL_TypeDef;
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/** Reference to ADC sample. */
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typedef enum
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{
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/** Internal 1.25V reference. */
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adcRef1V25 = _ADC_SINGLECTRL_REF_1V25,
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/** Internal 2.5V reference. */
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adcRef2V5 = _ADC_SINGLECTRL_REF_2V5,
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/** Buffered VDD. */
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adcRefVDD = _ADC_SINGLECTRL_REF_VDD,
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/** Internal differential 5V reference. */
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adcRef5VDIFF = _ADC_SINGLECTRL_REF_5VDIFF,
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/** Single ended ext. ref. from pin 6. */
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adcRefExtSingle = _ADC_SINGLECTRL_REF_EXTSINGLE,
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/** Differential ext. ref. from pin 6 and 7. */
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adcRef2xExtDiff = _ADC_SINGLECTRL_REF_2XEXTDIFF,
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/** Unbuffered 2xVDD. */
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adcRef2xVDD = _ADC_SINGLECTRL_REF_2XVDD
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} ADC_Ref_TypeDef;
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/** Sample resolution. */
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typedef enum
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{
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adcRes12Bit = _ADC_SINGLECTRL_RES_12BIT, /**< 12 bit sampling. */
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adcRes8Bit = _ADC_SINGLECTRL_RES_8BIT, /**< 8 bit sampling. */
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adcRes6Bit = _ADC_SINGLECTRL_RES_6BIT, /**< 6 bit sampling. */
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adcResOVS = _ADC_SINGLECTRL_RES_OVS /**< Oversampling. */
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} ADC_Res_TypeDef;
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/** Single sample input selection. */
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typedef enum
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{
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/* Differential mode disabled */
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adcSingleInpCh0 = _ADC_SINGLECTRL_INPUTSEL_CH0, /**< Channel 0. */
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adcSingleInpCh1 = _ADC_SINGLECTRL_INPUTSEL_CH1, /**< Channel 1. */
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adcSingleInpCh2 = _ADC_SINGLECTRL_INPUTSEL_CH2, /**< Channel 2. */
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adcSingleInpCh3 = _ADC_SINGLECTRL_INPUTSEL_CH3, /**< Channel 3. */
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adcSingleInpCh4 = _ADC_SINGLECTRL_INPUTSEL_CH4, /**< Channel 4. */
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adcSingleInpCh5 = _ADC_SINGLECTRL_INPUTSEL_CH5, /**< Channel 5. */
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adcSingleInpCh6 = _ADC_SINGLECTRL_INPUTSEL_CH6, /**< Channel 6. */
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adcSingleInpCh7 = _ADC_SINGLECTRL_INPUTSEL_CH7, /**< Channel 7. */
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adcSingleInpTemp = _ADC_SINGLECTRL_INPUTSEL_TEMP, /**< Temperature reference. */
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adcSingleInpVDDDiv3 = _ADC_SINGLECTRL_INPUTSEL_VDDDIV3, /**< VDD divided by 3. */
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adcSingleInpVDD = _ADC_SINGLECTRL_INPUTSEL_VDD, /**< VDD. */
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adcSingleInpVSS = _ADC_SINGLECTRL_INPUTSEL_VSS, /**< VSS. */
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adcSingleInpVrefDiv2 = _ADC_SINGLECTRL_INPUTSEL_VREFDIV2, /**< Vref divided by 2. */
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adcSingleInpDACOut0 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0, /**< DAC output 0. */
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adcSingleInpDACOut1 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1, /**< DAC output 1. */
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/* TBD: Use define when available */
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adcSingleInpATEST = 15, /**< ATEST. */
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/* Differential mode enabled */
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adcSingleInpCh0Ch1 = _ADC_SINGLECTRL_INPUTSEL_CH0CH1, /**< Positive Ch0, negative Ch1. */
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adcSingleInpCh2Ch3 = _ADC_SINGLECTRL_INPUTSEL_CH2CH3, /**< Positive Ch2, negative Ch3. */
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adcSingleInpCh4Ch5 = _ADC_SINGLECTRL_INPUTSEL_CH4CH5, /**< Positive Ch4, negative Ch5. */
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adcSingleInpCh6Ch7 = _ADC_SINGLECTRL_INPUTSEL_CH6CH7, /**< Positive Ch6, negative Ch7. */
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/* TBD: Use define when available */
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adcSingleInpDiff0 = 4 /**< Differential 0. */
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} ADC_SingleInput_TypeDef;
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/** Acquisition time (in ADC clock cycles). */
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typedef enum
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{
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/** Start single conversion. */
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adcStartSingle = ADC_CMD_SINGLESTART,
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/** Start scan sequence. */
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adcStartScan = ADC_CMD_SCANSTART,
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/**
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* Start scan sequence and single conversion, typically used when tailgating
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* single conversion after scan sequence.
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*/
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adcStartScanAndSingle = ADC_CMD_SCANSTART | ADC_CMD_SINGLESTART
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} ADC_Start_TypeDef;
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/** Warm-up mode. */
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typedef enum
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{
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/** ADC shutdown after each conversion. */
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adcWarmupNormal = _ADC_CTRL_WARMUPMODE_NORMAL,
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/** Do not warm-up bandgap references. */
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adcWarmupFastBG = _ADC_CTRL_WARMUPMODE_FASTBG,
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/** Reference selected for scan mode kept warm.*/
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adcWarmupKeepScanRefWarm = _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM,
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/** ADC and reference selected for scan mode kept warm.*/
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adcWarmupKeepADCWarm = _ADC_CTRL_WARMUPMODE_KEEPADCWARM
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} ADC_Warmup_TypeDef;
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/*******************************************************************************
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******************************* STRUCTS ***********************************
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******************************************************************************/
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/** ADC init structure, common for single conversion and scan sequence. */
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typedef struct
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{
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/**
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* Oversampling rate select. In order to have any effect, oversampling must
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* be enabled for single/scan mode.
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*/
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ADC_OvsRateSel_TypeDef ovsRateSel;
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/** Lowpass or decoupling capacitor filter to use. */
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ADC_LPFilter_TypeDef lpfMode;
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/** Warm-up mode to use for ADC. */
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ADC_Warmup_TypeDef warmUpMode;
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/**
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* Timebase used for ADC warm up. Select N to give (N+1)HFPERCLK cycles.
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* (Additional delay is added for bandgap references, please refer to the
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* reference manual.) Normally, N should be selected so that the timebase
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* is at least 1 us. See ADC_TimebaseCalcDefault() for a way to obtain
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* a suggested timebase of at least 1 us.
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*/
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uint8_t timebase;
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/** Clock division factor N, ADC clock = HFPERCLK / (N + 1). */
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uint8_t prescale;
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/** Enable/disable conversion tailgating. */
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bool tailgate;
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} ADC_Init_TypeDef;
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/** Default config for ADC init structure. */
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#define ADC_INIT_DEFAULT \
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{ adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
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adcLPFilterBypass, /* No input filter selected. */ \
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adcWarmupNormal, /* ADC shutdown after each conversion. */ \
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_ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
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_ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
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false /* Do not use tailgate. */ \
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}
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/** Scan sequence init structure. */
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typedef struct
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{
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/**
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* Peripheral reflex system trigger selection. Only applicable if @p prsEnable
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* is enabled.
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*/
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ADC_PRSSEL_TypeDef prsSel;
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/** Acquisition time (in ADC clock cycles). */
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ADC_AcqTime_TypeDef acqTime;
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/**
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* Sample reference selection. Notice that for external references, the
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* ADC calibration register must be set explicitly.
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*/
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ADC_Ref_TypeDef reference;
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/** Sample resolution. */
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ADC_Res_TypeDef resolution;
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/**
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* Input scan selection. If single ended (@p diff is false), use logical
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* combination of ADC_SCANCTRL_INPUTMASK_CHx defines. If differential input
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* (@p diff is true), use logical combination of ADC_SCANCTRL_INPUTMASK_CHxCHy
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* defines. (Notice underscore prefix for defines used.)
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*/
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uint32_t input;
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/** Select if single ended or differential input. */
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bool diff;
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/** Peripheral reflex system trigger enable. */
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bool prsEnable;
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/** Select if left adjustment should be done. */
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bool leftAdjust;
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/** Select if continuous conversion until explicit stop. */
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bool rep;
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} ADC_InitScan_TypeDef;
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/** Default config for ADC scan init structure. */
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#define ADC_INITSCAN_DEFAULT \
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{ adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
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adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
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adcRef1V25, /* 1.25V internal reference. */ \
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adcRes12Bit, /* 12 bit resolution. */ \
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0, /* No input selected. */ \
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false, /* Single ended input. */ \
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false, /* PRS disabled. */ \
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false, /* Right adjust. */ \
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false /* Deactivate conversion after one scan sequence. */ \
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}
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/** Single conversion init structure. */
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typedef struct
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{
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/**
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* Peripheral reflex system trigger selection. Only applicable if @p prsEnable
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* is enabled.
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*/
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ADC_PRSSEL_TypeDef prsSel;
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/** Acquisition time (in ADC clock cycles). */
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ADC_AcqTime_TypeDef acqTime;
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|
|
||
|
|
/**
|
||
|
|
* Sample reference selection. Notice that for external references, the
|
||
|
|
* ADC calibration register must be set explicitly.
|
||
|
|
*/
|
||
|
|
ADC_Ref_TypeDef reference;
|
||
|
|
|
||
|
|
/** Sample resolution. */
|
||
|
|
ADC_Res_TypeDef resolution;
|
||
|
|
|
||
|
|
/**
|
||
|
|
* Sample input selection, use single ended or differential input according
|
||
|
|
* to setting of @p diff.
|
||
|
|
*/
|
||
|
|
ADC_SingleInput_TypeDef input;
|
||
|
|
|
||
|
|
/** Select if single ended or differential input. */
|
||
|
|
bool diff;
|
||
|
|
|
||
|
|
/** Peripheral reflex system trigger enable. */
|
||
|
|
bool prsEnable;
|
||
|
|
|
||
|
|
/** Select if left adjustment should be done. */
|
||
|
|
bool leftAdjust;
|
||
|
|
|
||
|
|
/** Select if continuous conversion until explicit stop. */
|
||
|
|
bool rep;
|
||
|
|
} ADC_InitSingle_TypeDef;
|
||
|
|
|
||
|
|
/** Default config for ADC single conversion init structure. */
|
||
|
|
#define ADC_INITSINGLE_DEFAULT \
|
||
|
|
{ adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
|
||
|
|
adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
|
||
|
|
adcRef1V25, /* 1.25V internal reference. */ \
|
||
|
|
adcRes12Bit, /* 12 bit resolution. */ \
|
||
|
|
adcSingleInpCh0, /* CH0 input selected. */ \
|
||
|
|
false, /* Single ended input. */ \
|
||
|
|
false, /* PRS disabled. */ \
|
||
|
|
false, /* Right adjust. */ \
|
||
|
|
false /* Deactivate conversion after one scan sequence. */ \
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*******************************************************************************
|
||
|
|
***************************** PROTOTYPES **********************************
|
||
|
|
******************************************************************************/
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Get single conversion result.
|
||
|
|
*
|
||
|
|
* @note
|
||
|
|
* Do only use if single conversion data valid.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @return
|
||
|
|
*
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
|
||
|
|
{
|
||
|
|
return(adc->SINGLEDATA);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Get scan result.
|
||
|
|
*
|
||
|
|
* @note
|
||
|
|
* Do only use if scan data valid.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
|
||
|
|
{
|
||
|
|
return(adc->SCANDATA);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init);
|
||
|
|
void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init);
|
||
|
|
void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init);
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Clear one or more pending ADC interrupts.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @param[in] flags
|
||
|
|
* Pending ADC interrupt source to clear. Use a logical OR combination of
|
||
|
|
* valid interrupt flags for the ADC module (ADC_IF_nnn).
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
|
||
|
|
{
|
||
|
|
adc->IFC = flags;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Disable one or more ADC interrupts.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @param[in] flags
|
||
|
|
* ADC interrupt sources to disable. Use a logical OR combination of
|
||
|
|
* valid interrupt flags for the ADC module (ADC_IF_nnn).
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
|
||
|
|
{
|
||
|
|
adc->IEN &= ~(flags);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Enable one or more ADC interrupts.
|
||
|
|
*
|
||
|
|
* @note
|
||
|
|
* Depending on the use, a pending interrupt may already be set prior to
|
||
|
|
* enabling the interrupt. Consider using ADC_IntClear() prior to enabling
|
||
|
|
* if such a pending interrupt should be ignored.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @param[in] flags
|
||
|
|
* ADC interrupt sources to enable. Use a logical OR combination of
|
||
|
|
* valid interrupt flags for the ADC module (ADC_IF_nnn).
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
|
||
|
|
{
|
||
|
|
adc->IEN |= flags;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Get pending ADC interrupt flags.
|
||
|
|
*
|
||
|
|
* @note
|
||
|
|
* The event bits are not cleared by the use of this function.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @return
|
||
|
|
* ADC interrupt sources pending. A logical OR combination of valid
|
||
|
|
* interrupt flags for the ADC module (ADC_IF_nnn).
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
|
||
|
|
{
|
||
|
|
return(adc->IF);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Set one or more pending ADC interrupts from SW.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @param[in] flags
|
||
|
|
* ADC interrupt sources to set to pending. Use a logical OR combination of
|
||
|
|
* valid interrupt flags for the ADC module (ADC_IF_nnn).
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
|
||
|
|
{
|
||
|
|
adc->IFS = flags;
|
||
|
|
}
|
||
|
|
|
||
|
|
uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq);
|
||
|
|
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @brief
|
||
|
|
* Start scan sequence and/or single conversion.
|
||
|
|
*
|
||
|
|
* @param[in] adc
|
||
|
|
* Pointer to ADC peripheral register block.
|
||
|
|
*
|
||
|
|
* @param[in] cmd
|
||
|
|
* Command indicating which type of sampling to start.
|
||
|
|
******************************************************************************/
|
||
|
|
static __INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
|
||
|
|
{
|
||
|
|
adc->CMD = (uint32_t) cmd;
|
||
|
|
}
|
||
|
|
|
||
|
|
void ADC_Reset(ADC_TypeDef *adc);
|
||
|
|
uint8_t ADC_TimebaseCalc(uint32_t hfperFreq);
|
||
|
|
|
||
|
|
/** @} (end addtogroup ADC) */
|
||
|
|
/** @} (end addtogroup EFM32_Library) */
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __EFM32_ADC_H */
|