375 lines
11 KiB
C
375 lines
11 KiB
C
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/* *****************************************************************************
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* Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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* $Date: 2019-07-01 11:06:19 -0500 (Mon, 01 Jul 2019) $
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* $Revision: 44383 $
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*
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**************************************************************************** */
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#include <stddef.h>
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#include <stdint.h>
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#include "mxc_config.h"
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#include "mxc_assert.h"
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#include "mxc_lock.h"
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#include "mxc_sys.h"
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#include "dma.h"
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/*
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* Structure type
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*/
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typedef struct {
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unsigned int valid; /* Flag to invalidate this resource */
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unsigned int instance; /* Hardware instance of this DMA controller */
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unsigned int id; /* Channel ID, which matches the index into the underlying hardware */
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mxc_dma_ch_regs_t *regs; /* Pointer to the registers for this channel */
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void (*cb)(int, int); /* Pointer to a callback function type */
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} dma_channel_t;
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#define CHECK_HANDLE(x) ((x >= 0) && (x < MXC_DMA_CHANNELS) && (dma_resource[x].valid))
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/* DMA driver must be initialized once before use, and may not be initialized again without shutdown, as it is a shared resource */
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static unsigned int dma_initialized = 0;
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static dma_channel_t dma_resource[MXC_DMA_CHANNELS];
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static uint32_t dma_lock;
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/* Initialize DMA to known state */
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int DMA_Init(void)
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{
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int i;
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if (dma_initialized) {
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return E_BAD_STATE;
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}
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/* Initialize any system-level DMA settings */
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SYS_DMA_Init();
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/* Initialize mutex */
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mxc_free_lock(&dma_lock);
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if (mxc_get_lock(&dma_lock, 1) != E_NO_ERROR) {
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return E_BUSY;
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}
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/* Ensure all channels are disabled at start, clear flags, init handles */
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MXC_DMA->cn = 0;
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for (i = 0; i < MXC_DMA_CHANNELS; i++) {
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dma_resource[i].valid = 0;
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dma_resource[i].instance = 0;
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dma_resource[i].id = i;
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dma_resource[i].regs = (mxc_dma_ch_regs_t *)&MXC_DMA->ch[i];
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dma_resource[i].regs->cfg = 0;
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dma_resource[i].regs->st = dma_resource[i].regs->st;
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dma_resource[i].cb = NULL;
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}
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dma_initialized++;
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mxc_free_lock(&dma_lock);
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return E_NO_ERROR;
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}
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/* Shut down DMA in an orderly manner, informing clients that their requests did not complete */
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int DMA_Shutdown(void)
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{
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int i;
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if (!dma_initialized) {
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/* Never initialized, so shutdown is not appropriate */
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return E_BUSY;
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}
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if (mxc_get_lock(&dma_lock, 1) != E_NO_ERROR) {
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return E_BUSY;
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}
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/* Prevent any new resource allocation by this API */
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dma_initialized = 0;
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/* Disable interrupts, preventing future callbacks */
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MXC_DMA->cn = 0;
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/* For each channel:
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* - invalidate the handles held by clients
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* - stop any transfer in progress
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*/
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for (i = 0; i < MXC_DMA_CHANNELS; i++) {
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dma_resource[i].regs->cfg = 0;
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if (dma_resource[i].valid) {
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dma_resource[i].valid = 0;
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if (dma_resource[i].cb != NULL) {
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dma_resource[i].cb(i, E_SHUTDOWN);
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}
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}
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}
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/* Disable any system-level DMA settings */
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SYS_DMA_Shutdown();
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mxc_free_lock(&dma_lock);
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return E_NO_ERROR;
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}
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/* Request DMA channel */
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/* Once "owned", this channel may be used directly via the DMA_GetCHRegs(ch) pointer, or */
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/* configured via the API functions */
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int DMA_AcquireChannel(void)
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{
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int i, channel;
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/* Check for initialization */
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if (!dma_initialized) {
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return E_BAD_STATE;
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}
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/* If DMA is locked return busy */
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if (mxc_get_lock(&dma_lock, 1) != E_NO_ERROR) {
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return E_BUSY;
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}
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/* Default is no channel available */
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channel = E_NONE_AVAIL;
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if (dma_initialized) {
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for (i = 0; i < MXC_DMA_CHANNELS; i++) {
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if (!dma_resource[i].valid) {
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/* Found one */
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channel = i;
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dma_resource[i].valid = 1;
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dma_resource[i].regs->cfg = 0;
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dma_resource[i].regs->cnt_rld = 0; /* Used by DMA_Start() to conditionally set RLDEN */
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break;
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}
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}
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}
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mxc_free_lock(&dma_lock);
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return channel;
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}
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/* Release DMA channel */
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/* Callbacks will not be called */
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int DMA_ReleaseChannel(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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if (mxc_get_lock(&dma_lock, 1) != E_NO_ERROR) {
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return E_BUSY;
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}
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dma_resource[ch].valid = 0;
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dma_resource[ch].regs->cfg = 0;
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dma_resource[ch].regs->st = dma_resource[ch].regs->st;
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mxc_free_lock(&dma_lock);
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Channel configuration */
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int DMA_ConfigChannel(int ch,
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dma_priority_t prio,
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dma_reqsel_t reqsel, unsigned int reqwait_en,
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dma_timeout_t tosel, dma_prescale_t pssel,
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dma_width_t srcwd, unsigned int srcinc_en,
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dma_width_t dstwd, unsigned int dstinc_en,
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unsigned int burst_size, unsigned int chdis_inten,
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unsigned int ctz_inten)
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{
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if (CHECK_HANDLE(ch) && (burst_size > 0)) {
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/* Designed to be safe, not speedy. Should not be called often */
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dma_resource[ch].regs->cfg =
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((reqwait_en ? MXC_F_DMA_CFG_REQWAIT : 0) |
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(srcinc_en ? MXC_F_DMA_CFG_SRCINC : 0) |
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(dstinc_en ? MXC_F_DMA_CFG_DSTINC : 0) |
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(chdis_inten ? MXC_F_DMA_CFG_CHDIEN : 0) |
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(ctz_inten ? MXC_F_DMA_CFG_CTZIEN : 0) |
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prio |reqsel | tosel | pssel |
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(srcwd << MXC_F_DMA_CFG_SRCWD_POS) |
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(dstwd << MXC_F_DMA_CFG_DSTWD_POS) |
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(((burst_size - 1) << MXC_F_DMA_CFG_BRST_POS) & MXC_F_DMA_CFG_BRST));
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/*
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* DMA request selects for peripherals will override either src_addr or dst_addr.
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* In these cases, the overridden address is a don't care and may be 0.
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*/
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int DMA_SetSrcDstCnt(int ch,
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void *src_addr,
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void *dst_addr,
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unsigned int count)
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{
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if (CHECK_HANDLE(ch)) {
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dma_resource[ch].regs->src = (unsigned int)src_addr;
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dma_resource[ch].regs->dst = (unsigned int)dst_addr;
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dma_resource[ch].regs->cnt = count;
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Must set en_reload == 1 to have any effect */
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int DMA_SetReload(int ch,
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void *src_addr_reload,
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void *dst_addr_reload,
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unsigned int count_reload)
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{
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if (CHECK_HANDLE(ch)) {
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dma_resource[ch].regs->src_rld = (unsigned int)src_addr_reload;
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dma_resource[ch].regs->dst_rld = (unsigned int)dst_addr_reload;
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if (dma_resource[ch].regs->cfg & MXC_F_DMA_CFG_CHEN) {
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/* If channel is already running, set RLDEN to enable next reload */
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dma_resource[ch].regs->cnt_rld = MXC_F_DMA_CNT_RLD_RLDEN | count_reload;
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} else {
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/* Otherwise, this is the initial setup, so DMA_Start() will handle setting that bit */
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dma_resource[ch].regs->cnt_rld = count_reload;
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}
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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int DMA_SetCallback(int ch, void (*callback)(int, int))
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{
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if (CHECK_HANDLE(ch)) {
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/* Callback for interrupt handler, no checking is done, as NULL is valid for (none) */
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dma_resource[ch].cb = callback;
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Interrupt enable/disable */
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int DMA_EnableInterrupt(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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MXC_DMA->cn |= (1 << ch);
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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int DMA_DisableInterrupt(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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MXC_DMA->cn &= ~(1 << ch);
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Channel interrupt flags */
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int DMA_GetFlags(int ch, unsigned int *fl)
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{
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if (CHECK_HANDLE(ch) && fl) {
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*fl = dma_resource[ch].regs->st;
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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int DMA_ClearFlags(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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dma_resource[ch].regs->st = dma_resource[ch].regs->st;
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Start channel */
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int DMA_Start(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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DMA_ClearFlags(ch);
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if (dma_resource[ch].regs->cnt_rld) {
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dma_resource[ch].regs->cfg |= (MXC_F_DMA_CFG_CHEN | MXC_F_DMA_CFG_RLDEN);
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} else {
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dma_resource[ch].regs->cfg |= MXC_F_DMA_CFG_CHEN;
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}
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Stop channel */
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int DMA_Stop(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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dma_resource[ch].regs->cfg &= ~MXC_F_DMA_CFG_CHEN;
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} else {
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return E_BAD_PARAM;
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}
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return E_NO_ERROR;
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}
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/* Get pointer to registers, for advanced users */
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mxc_dma_ch_regs_t *DMA_GetCHRegs(int ch)
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{
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if (CHECK_HANDLE(ch)) {
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return dma_resource[ch].regs;
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} else {
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return NULL;
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}
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}
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/* */
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void DMA_Handler(int ch)
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{
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/* Do callback, if enabled */
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if (dma_resource[ch].cb != NULL) {
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dma_resource[ch].cb(ch, E_NO_ERROR);
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}
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DMA_ClearFlags(ch);
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}
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