271 lines
12 KiB
C
271 lines
12 KiB
C
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/*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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/******************************************************************************/
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/** \file hc32f460_i2c.h
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**
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** A detailed description is available at
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** @link I2cGroup Inter-Integrated Circuit(I2C) description @endlink
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**
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** - 2018-10-16 CDT First version for Device Driver Library of I2C.
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**
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******************************************************************************/
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#ifndef __HC32F460_I2C_H__
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#define __HC32F460_I2C_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_common.h"
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#include "ddl_config.h"
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#if (DDL_I2C_ENABLE == DDL_ON)
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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*******************************************************************************
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** \defgroup I2cGroup Inter-Integrated Circuit (I2C)
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**
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******************************************************************************/
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//@{
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief I2c configuration structure
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**
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******************************************************************************/
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typedef struct stc_i2c_init
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{
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uint32_t u32ClockDiv; ///< I2C clock division for i2c source clock
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uint32_t u32Baudrate; ///< I2C baudrate config
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uint32_t u32SclTime; ///< The SCL rising and falling time, count of T(i2c source clock after frequency divider)
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}stc_i2c_init_t;
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/**
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*******************************************************************************
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** \brief I2c SMBUS configuration structure
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**
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******************************************************************************/
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typedef struct stc_i2c_smbus_init
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{
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en_functional_state_t enHostAdrMatchFunc; ///< SMBUS host address matching function
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en_functional_state_t enDefaultAdrMatchFunc; ///< SMBUS default address matching function
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en_functional_state_t enAlarmAdrMatchFunc; ///< SMBUS Alarm address matching function
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}stc_i2c_smbus_init_t;
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/**
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*******************************************************************************
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** \brief I2c digital filter mode enumeration
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**
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******************************************************************************/
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typedef enum en_i2c_digital_filter_mode
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{
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Filter1BaseCycle = 0u, ///< I2C digital filter ability 1 base cycle
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Filter2BaseCycle = 1u, ///< I2C digital filter ability 2 base cycle
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Filter3BaseCycle = 2u, ///< I2C digital filter ability 3 base cycle
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Filter4BaseCycle = 3u, ///< I2C digital filter ability 4 base cycle
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}en_i2c_digital_filter_mode_t;
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/**
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*******************************************************************************
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** \brief I2c address bit enumeration
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**
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******************************************************************************/
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typedef enum en_address_bit
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{
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Adr7bit = 0u, ///< I2C address length is 7 bits
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Adr10bit = 1u, ///< I2C address length is 10 bits
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}en_address_bit_t;
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/**
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*******************************************************************************
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** \brief I2c transfer direction enumeration
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**
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******************************************************************************/
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typedef enum en_trans_direction
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{
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I2CDirTrans = 0u,
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I2CDirReceive = 1u,
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}en_trans_direction_t;
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/**
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*******************************************************************************
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** \brief I2c clock timeout switch enumeration
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**
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******************************************************************************/
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typedef enum en_clock_timeout_switch
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{
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TimeoutFunOff = 0u, ///< I2C SCL pin time out function off
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LowTimerOutOn = 3u, ///< I2C SCL pin high level time out function on
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HighTimeOutOn = 5u, ///< I2C SCL pin low level time out function on
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BothTimeOutOn = 7u, ///< I2C SCL pin both(low and high) level time out function on
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}en_clock_timeout_switch_t;
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/**
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*******************************************************************************
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** \brief I2c clock timeout initialize structure
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**
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******************************************************************************/
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typedef struct stc_clock_timeout_init
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{
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en_clock_timeout_switch_t enClkTimeOutSwitch; ///< I2C clock timeout function switch
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uint16_t u16TimeOutHigh; ///< I2C clock timeout period for High level
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uint16_t u16TimeOutLow; ///< I2C clock timeout period for Low level
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}stc_clock_timeout_init_t;
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/**
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*******************************************************************************
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** \brief I2c ACK config enumeration
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**
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******************************************************************************/
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typedef enum en_i2c_ack_config
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{
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I2c_ACK = 0u,
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I2c_NACK = 1u,
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}en_i2c_ack_config_t;
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/* define interrupt enable bit for I2C_CR2 register */
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#define I2C_CR2_STARTIE (0x00000001ul)
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#define I2C_CR2_SLADDR0EN (0x00000002ul)
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#define I2C_CR2_SLADDR1EN (0x00000004ul)
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#define I2C_CR2_TENDIE (0x00000008ul)
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#define I2C_CR2_STOPIE (0x00000010ul)
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#define I2C_CR2_RFULLIE (0x00000040ul)
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#define I2C_CR2_TEMPTYIE (0x00000080ul)
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#define I2C_CR2_ARLOIE (0x00000200ul)
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#define I2C_CR2_NACKIE (0x00001000ul)
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#define I2C_CR2_TMOURIE (0x00004000ul)
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#define I2C_CR2_GENCALLIE (0x00100000ul)
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#define I2C_CR2_SMBDEFAULTIE (0x00200000ul)
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#define I2C_CR2_SMBHOSTIE (0x00400000ul)
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#define I2C_CR2_SMBALRTIE (0x00800000ul)
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/* define status bit for I2C_SR register */
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#define I2C_SR_STARTF (0x00000001ul)
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#define I2C_SR_SLADDR0F (0x00000002ul)
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#define I2C_SR_SLADDR1F (0x00000004ul)
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#define I2C_SR_TENDF (0x00000008ul)
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#define I2C_SR_STOPF (0x00000010ul)
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#define I2C_SR_RFULLF (0x00000040ul)
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#define I2C_SR_TEMPTYF (0x00000080ul)
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#define I2C_SR_ARLOF (0x00000200ul)
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#define I2C_SR_ACKRF (0x00000400ul)
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#define I2C_SR_NACKF (0x00001000ul)
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#define I2C_SR_TMOUTF (0x00004000ul)
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#define I2C_SR_MSL (0x00010000ul)
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#define I2C_SR_BUSY (0x00020000ul)
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#define I2C_SR_TRA (0x00040000ul)
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#define I2C_SR_GENCALLF (0x00100000ul)
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#define I2C_SR_SMBDEFAULTF (0x00200000ul)
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#define I2C_SR_SMBHOSTF (0x00400000ul)
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#define I2C_SR_SMBALRTF (0x00800000ul)
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/* define status clear bit for I2C_CLR register*/
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#define I2C_CLR_STARTFCLR (0x00000001ul)
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#define I2C_CLR_SLADDR0FCLR (0x00000002ul)
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#define I2C_CLR_SLADDR1FCLR (0x00000004ul)
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#define I2C_CLR_TENDFCLR (0x00000008ul)
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#define I2C_CLR_STOPFCLR (0x00000010ul)
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#define I2C_CLR_RFULLFCLR (0x00000040ul)
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#define I2C_CLR_TEMPTYFCLR (0x00000080ul)
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#define I2C_CLR_ARLOFCLR (0x00000200ul)
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#define I2C_CLR_NACKFCLR (0x00001000ul)
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#define I2C_CLR_TMOUTFCLR (0x00004000ul)
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#define I2C_CLR_GENCALLFCLR (0x00100000ul)
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#define I2C_CLR_SMBDEFAULTFCLR (0x00200000ul)
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#define I2C_CLR_SMBHOSTFCLR (0x00400000ul)
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#define I2C_CLR_SMBALRTFCLR (0x00800000ul)
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#define I2C_CLR_MASK (0x00F056DFul)
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/* I2C_Clock_Division I2C clock division */
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#define I2C_CLK_DIV1 (0ul) /* I2c source clock/1 */
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#define I2C_CLK_DIV2 (1ul) /* I2c source clock/2 */
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#define I2C_CLK_DIV4 (2ul) /* I2c source clock/4 */
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#define I2C_CLK_DIV8 (3ul) /* I2c source clock/8 */
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#define I2C_CLK_DIV16 (4ul) /* I2c source clock/16 */
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#define I2C_CLK_DIV32 (5ul) /* I2c source clock/32 */
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#define I2C_CLK_DIV64 (6ul) /* I2c source clock/64 */
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#define I2C_CLK_DIV128 (7ul) /* I2c source clock/128 */
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/**
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* @}
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*/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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en_result_t I2C_BaudrateConfig(M4_I2C_TypeDef* pstcI2Cx, const stc_i2c_init_t* pstcI2cInit, float32_t *pf32Error);
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en_result_t I2C_DeInit(M4_I2C_TypeDef* pstcI2Cx);
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en_result_t I2C_Init(M4_I2C_TypeDef* pstcI2Cx, const stc_i2c_init_t* pstcI2cInit, float32_t *pf32Error);
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void I2C_Cmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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en_result_t I2C_SmbusConfig(M4_I2C_TypeDef* pstcI2Cx, const stc_i2c_smbus_init_t* pstcI2C_SmbusInitStruct);
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void I2C_SmBusCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_SoftwareResetCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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////////////////////////////////////////////////////////////////////////////////////////
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void I2C_DigitalFilterConfig(M4_I2C_TypeDef* pstcI2Cx, en_i2c_digital_filter_mode_t enDigiFilterMode);
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void I2C_DigitalFilterCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_AnalogFilterCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_GeneralCallCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_SlaveAdr0Config(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState, en_address_bit_t enAdrMode, uint32_t u32Adr);
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void I2C_SlaveAdr1Config(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState, en_address_bit_t enAdrMode, uint32_t u32Adr);
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en_result_t I2C_ClkTimeOutConfig(M4_I2C_TypeDef* pstcI2Cx, const stc_clock_timeout_init_t* pstcTimoutInit);
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void I2C_IntCmd(M4_I2C_TypeDef* pstcI2Cx, uint32_t u32IntEn, en_functional_state_t enNewState);
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void I2C_FastAckCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_BusWaitCmd(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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///////////////////////////////////////////////////////////////////////////////////////
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void I2C_GenerateStart(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_GenerateReStart(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_GenerateStop(M4_I2C_TypeDef* pstcI2Cx, en_functional_state_t enNewState);
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void I2C_WriteData(M4_I2C_TypeDef* pstcI2Cx, uint8_t u8Data);
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uint8_t I2C_ReadData(M4_I2C_TypeDef* pstcI2Cx);
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void I2C_AckConfig(M4_I2C_TypeDef* pstcI2Cx, en_i2c_ack_config_t u32AckConfig);
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en_flag_status_t I2C_GetStatus(M4_I2C_TypeDef* pstcI2Cx, uint32_t u32StatusBit);
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void I2C_ClearStatus(M4_I2C_TypeDef* pstcI2Cx, uint32_t u32StatusBit);
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/* High level functions for reference ********************************/
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en_result_t I2C_Start(M4_I2C_TypeDef* pstcI2Cx, uint32_t u32Timeout);
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en_result_t I2C_Restart(M4_I2C_TypeDef* pstcI2Cx, uint32_t u32Timeout);
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en_result_t I2C_TransAddr(M4_I2C_TypeDef* pstcI2Cx, uint8_t u8Addr, en_trans_direction_t enDir, uint32_t u32Timeout);
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en_result_t I2C_Trans10BitAddr(M4_I2C_TypeDef* pstcI2Cx, uint16_t u16Addr, en_trans_direction_t enDir, uint32_t u32Timeout);
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en_result_t I2C_TransData(M4_I2C_TypeDef* pstcI2Cx, uint8_t const au8TxData[], uint32_t u32Size, uint32_t u32Timeout);
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en_result_t I2C_ReceiveData(M4_I2C_TypeDef* pstcI2Cx, uint8_t au8RxData[], uint32_t u32Size, uint32_t u32Timeout);
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en_result_t I2C_Stop(M4_I2C_TypeDef* pstcI2Cx, uint32_t u32Timeout);
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en_result_t I2C_WaitStatus(const M4_I2C_TypeDef *pstcI2Cx, uint32_t u32Flag, en_flag_status_t enStatus, uint32_t u32Timeout);
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en_result_t I2C_MasterDataReceiveAndStop(M4_I2C_TypeDef* pstcI2Cx, uint8_t au8RxData[], uint32_t u32Size, uint32_t u32Timeout);
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//@} // I2cGroup
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#ifdef __cplusplus
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}
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#endif
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#endif /* DDL_I2C_ENABLE */
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#endif /* __HC32F460_I2C_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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