2020-12-21 14:34:01 +08:00
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/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-12-3 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)
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#include <rtdevice.h>
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2021-03-15 15:41:41 +08:00
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#include "NuMicro.h"
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2020-12-21 14:34:01 +08:00
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#include <drv_sys.h>
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/* Private define ---------------------------------------------------------------*/
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#define NU_TIMER_DEVICE(etimer) (nu_etimer_t)(etimer)
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enum
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{
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ETIMER_START = -1,
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#if defined(BSP_USING_TIMER0)
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ETIMER0_IDX,
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#endif
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#if defined(BSP_USING_TIMER1)
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ETIMER1_IDX,
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#endif
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#if defined(BSP_USING_TIMER2)
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ETIMER2_IDX,
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#endif
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#if defined(BSP_USING_TIMER3)
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ETIMER3_IDX,
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#endif
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#if defined(BSP_USING_TIMER4)
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ETIMER4_IDX,
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#endif
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/* BSP_USING_TIMER5 is reserved for Systick usage. */
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ETIMER_CNT
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};
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/* Private typedef --------------------------------------------------------------*/
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struct nu_etimer
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{
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rt_hwtimer_t parent;
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char *name;
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uint32_t idx;
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IRQn_Type irqn;
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E_SYS_IPRST rstidx;
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E_SYS_IPCLK clkidx;
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};
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typedef struct nu_etimer *nu_etimer_t;
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/* Private functions ------------------------------------------------------------*/
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static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state);
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static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode);
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static void nu_etimer_stop(rt_hwtimer_t *timer);
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static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer);
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static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args);
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/* Public functions -------------------------------------------------------------*/
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/* Private variables ------------------------------------------------------------*/
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static struct nu_etimer nu_etimer_arr [] =
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{
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#if defined(BSP_USING_TIMER0)
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{
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.name = "etimer0",
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.idx = 0,
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.irqn = IRQ_TIMER0,
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.rstidx = TIMER0RST,
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.clkidx = TIMER0CKEN,
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},
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#endif
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#if defined(BSP_USING_TIMER1)
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{
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.name = "etimer1",
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.idx = 1,
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.irqn = IRQ_TIMER1,
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.rstidx = TIMER1RST,
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.clkidx = TIMER1CKEN,
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},
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#endif
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#if defined(BSP_USING_TIMER2)
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{
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.name = "etimer2",
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.idx = 2,
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.irqn = IRQ_TIMER2,
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.rstidx = TIMER2RST,
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.clkidx = TIMER2CKEN,
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},
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#endif
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#if defined(BSP_USING_TIMER3)
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{
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.name = "etimer3",
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.idx = 3,
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.irqn = IRQ_TIMER3,
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.rstidx = TIMER3RST,
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.clkidx = TIMER3CKEN,
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},
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#endif
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#if defined(BSP_USING_TIMER4)
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{
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.name = "etimer4",
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.idx = 4,
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.irqn = IRQ_TIMER4,
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.rstidx = TIMER4RST,
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.clkidx = TIMER4CKEN,
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},
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#endif
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/* BSP_USING_TIMER5 is reserved for Systick usage. */
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};
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static struct rt_hwtimer_info nu_etimer_info =
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{
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12000000, /* maximum count frequency */
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46875, /* minimum count frequency */
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0xFFFFFF, /* the maximum counter value */
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HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */
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};
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static struct rt_hwtimer_ops nu_etimer_ops =
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{
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nu_etimer_init,
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nu_etimer_start,
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nu_etimer_stop,
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nu_etimer_count_get,
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nu_etimer_control
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};
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/* Functions define ------------------------------------------------------------*/
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static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuETmr != RT_NULL);
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if (1 == state)
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{
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uint32_t timer_clk;
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struct rt_hwtimer_info *info = &nu_etimer_info;
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timer_clk = ETIMER_GetModuleClock(psNuETmr->idx);
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info->maxfreq = timer_clk;
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info->minfreq = timer_clk / 256;
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ETIMER_Open(psNuETmr->idx, ETIMER_ONESHOT_MODE, 1);
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ETIMER_EnableInt(psNuETmr->idx);
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rt_hw_interrupt_umask(psNuETmr->irqn);
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}
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else
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{
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rt_hw_interrupt_mask(psNuETmr->irqn);
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ETIMER_DisableInt(psNuETmr->idx);
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ETIMER_Close(psNuETmr->idx);
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}
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}
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static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode)
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{
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2023-03-16 12:44:05 +08:00
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rt_err_t ret = -RT_EINVAL;
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2020-12-21 14:34:01 +08:00
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rt_uint32_t u32OpMode;
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nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuETmr != RT_NULL);
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if (cnt <= 1 || cnt > 0xFFFFFF)
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{
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goto exit_nu_etimer_start;
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}
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switch (opmode)
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{
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case HWTIMER_MODE_PERIOD:
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u32OpMode = ETIMER_PERIODIC_MODE;
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break;
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case HWTIMER_MODE_ONESHOT:
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u32OpMode = ETIMER_ONESHOT_MODE;
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break;
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default:
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goto exit_nu_etimer_start;
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}
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ETIMER_SET_CMP_VALUE(psNuETmr->idx, cnt);
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ETIMER_SET_OPMODE(psNuETmr->idx, u32OpMode);
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ETIMER_EnableInt(psNuETmr->idx);
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rt_hw_interrupt_umask(psNuETmr->irqn);
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ETIMER_Start(psNuETmr->idx);
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ret = RT_EOK;
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exit_nu_etimer_start:
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return -(ret);
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}
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static void nu_etimer_stop(rt_hwtimer_t *timer)
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{
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nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuETmr != RT_NULL);
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rt_hw_interrupt_mask(psNuETmr->irqn);
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ETIMER_DisableInt(psNuETmr->idx);
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ETIMER_Stop(psNuETmr->idx);
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ETIMER_ClearCounter(psNuETmr->idx);
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}
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static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer)
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{
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nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuETmr != RT_NULL);
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return ETIMER_GetCounter(psNuETmr->idx);
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}
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static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
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{
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rt_err_t ret = RT_EOK;
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nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuETmr != RT_NULL);
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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uint32_t clk;
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uint32_t pre;
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clk = ETIMER_GetModuleClock(psNuETmr->idx);
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pre = clk / *((uint32_t *)args) - 1;
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ETIMER_SET_PRESCALE_VALUE(psNuETmr->idx, pre);
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*((uint32_t *)args) = clk / (pre + 1) ;
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}
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break;
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case HWTIMER_CTRL_STOP:
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ETIMER_Stop(psNuETmr->idx);
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break;
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default:
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2023-03-16 12:44:05 +08:00
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ret = -RT_EINVAL;
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2020-12-21 14:34:01 +08:00
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break;
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}
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return -(ret);
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}
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/**
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* All UART interrupt service routine
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*/
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static void nu_etimer_isr(int vector, void *param)
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{
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nu_etimer_t psNuETmr = NU_TIMER_DEVICE(param);
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RT_ASSERT(psNuETmr != RT_NULL);
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if (ETIMER_GetIntFlag(psNuETmr->idx))
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{
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ETIMER_ClearIntFlag(psNuETmr->idx);
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rt_device_hwtimer_isr(&psNuETmr->parent);
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}
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}
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int rt_hw_etimer_init(void)
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{
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int i;
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rt_err_t ret = RT_EOK;
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for (i = (ETIMER_START + 1); i < ETIMER_CNT; i++)
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{
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nu_sys_ipclk_enable(nu_etimer_arr[i].clkidx);
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nu_sys_ip_reset(nu_etimer_arr[i].rstidx);
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/* Register Etimer information. */
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nu_etimer_arr[i].parent.info = &nu_etimer_info;
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/* Register Etimer operation. */
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nu_etimer_arr[i].parent.ops = &nu_etimer_ops;
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/* Register Etimer interrupt service routine. */
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rt_hw_interrupt_install(nu_etimer_arr[i].irqn, nu_etimer_isr, &nu_etimer_arr[i], nu_etimer_arr[i].name);
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/* Register RT hwtimer device. */
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ret = rt_device_hwtimer_register(&nu_etimer_arr[i].parent, nu_etimer_arr[i].name, &nu_etimer_arr[i]);
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RT_ASSERT(ret == RT_EOK);
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}
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return 0;
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}
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INIT_BOARD_EXPORT(rt_hw_etimer_init);
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#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)
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