2015-08-07 13:30:13 +08:00
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/*
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2018-10-16 13:00:37 +08:00
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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2015-08-07 13:30:13 +08:00
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*
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2018-10-16 13:00:37 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2015-08-07 13:30:13 +08:00
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*
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* Change Logs:
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* Date Author Notes
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2018-10-16 13:00:37 +08:00
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* 2015-08-03 xiaonong The first version for STM32F7
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2015-08-07 13:30:13 +08:00
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*/
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#ifndef __DRV_SDRAM_H__
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#define __DRV_SDRAM_H__
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#include <rtthread.h>
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#include <board.h>
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2018-05-18 20:19:18 +08:00
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#define SDRAM_BANK_ADDR ((uint32_t)0xC0000000)
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#define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
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#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
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#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
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#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
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#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
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#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
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#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
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#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
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#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
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#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
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#define SDRAM_SIZE (16UL * 1024UL * 1024UL)
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#define SDRAM_BEGIN SDRAM_BANK_ADDR
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#define SDRAM_END (SDRAM_BANK_ADDR + SDRAM_SIZE)
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extern int bsp_sdram_hw_init(void);
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2015-08-07 13:30:13 +08:00
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#endif
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