331 lines
8.6 KiB
C
331 lines
8.6 KiB
C
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/*
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* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/******************************************************************************
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* @file dw_timer.c
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* @brief CSI Source File for timer Driver
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* @version V1.0
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* @date 02. June 2017
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******************************************************************************/
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#include "csi_core.h"
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#include "drv_timer.h"
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#include "dw_timer.h"
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#include "soc.h"
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#define ERR_TIMER(errno) (CSI_DRV_ERRNO_TIMER_BASE | errno)
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#define TIMER_NULL_PARAM_CHK(para) \
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do { \
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if (para == NULL) { \
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return ERR_TIMER(EDRV_PARAMETER); \
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} \
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} while (0)
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typedef struct {
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uint32_t base;
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uint32_t irq;
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timer_event_cb_t cb_event;
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uint32_t timeout; ///< the set time (us)
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uint32_t timeout_flag;
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void *arg;
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} dw_timer_priv_t;
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static dw_timer_priv_t timer_instance[CONFIG_TIMER_NUM];
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static const timer_capabilities_t timer_capabilities = {
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.interrupt_mode = 1 ///< supports Interrupt mode
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};
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/**
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\brief Make all the timers in the idle state.
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\param[in] pointer to timer register base
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*/
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static void timer_deactive_control(dw_timer_reg_t *addr)
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{
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/* stop the corresponding timer */
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addr->TxControl &= ~DW_TIMER_TXCONTROL_ENABLE;
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/* Disable interrupt. */
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addr->TxControl |= DW_TIMER_TXCONTROL_INTMASK;
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}
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void dw_timer_irqhandler(int idx)
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{
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dw_timer_priv_t *timer_priv = &timer_instance[idx];
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timer_priv->timeout_flag = 1;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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addr->TxEOI;
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if (timer_priv->cb_event) {
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return timer_priv->cb_event(TIMER_EVENT_TIMEOUT, timer_priv->arg);
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}
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}
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int32_t __attribute__((weak)) target_get_timer_count(void)
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{
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return 0;
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}
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int32_t __attribute__((weak)) target_get_timer(uint32_t idx, uint32_t *base, uint32_t *irq)
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{
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return NULL;
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}
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/**
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\brief get timer instance count.
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\return timer instance count
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*/
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int32_t csi_timer_get_instance_count(void)
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{
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return target_get_timer_count();
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}
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/**
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\brief Initialize TIMER Interface. 1. Initializes the resources needed for the TIMER interface 2.registers event callback function
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\param[in] idx instance timer index
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\param[in] cb_event Pointer to \ref timer_event_cb_t
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\return pointer to timer instance
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*/
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timer_handle_t csi_timer_initialize(int32_t idx, timer_event_cb_t cb_event, void *arg)
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{
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if (idx < 0 || idx >= CONFIG_TIMER_NUM) {
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return NULL;
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}
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uint32_t base = 0u;
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uint32_t irq = 0u;
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int32_t real_idx = target_get_timer(idx, &base, &irq);
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if (real_idx != idx) {
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return NULL;
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}
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dw_timer_priv_t *timer_priv = &timer_instance[idx];
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timer_priv->base = base;
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timer_priv->irq = irq;
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timer_priv->arg = arg;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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timer_priv->timeout = DW_TIMER_INIT_DEFAULT_VALUE;
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timer_deactive_control(addr);
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timer_priv->cb_event = cb_event;
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drv_nvic_enable_irq(timer_priv->irq);
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return (timer_handle_t)timer_priv;
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}
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/**
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\brief De-initialize TIMER Interface. stops operation and releases the software resources used by the interface
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\param[in] handle timer handle to operate.
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\return error code
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*/
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int32_t csi_timer_uninitialize(timer_handle_t handle)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = (dw_timer_priv_t *)handle;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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timer_deactive_control(addr);
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timer_priv->cb_event = NULL;
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drv_nvic_disable_irq(timer_priv->irq);
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return 0;
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}
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/**
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\brief Get driver capabilities.
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\param[in] handle timer handle to operate.
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\return \ref timer_capabilities_t
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*/
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timer_capabilities_t csi_timer_get_capabilities(timer_handle_t handle)
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{
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return timer_capabilities;
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}
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/**
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\brief config timer mode.
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\param[in] handle timer handle to operate.
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\param[in] mode \ref timer_mode_e
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\return error code
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*/
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int32_t csi_timer_config(timer_handle_t handle, timer_mode_e mode)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = handle;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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switch (mode) {
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case TIMER_MODE_FREE_RUNNING:
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addr->TxControl &= ~DW_TIMER_TXCONTROL_MODE;
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break;
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case TIMER_MODE_RELOAD:
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addr->TxControl |= DW_TIMER_TXCONTROL_MODE;
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break;
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default:
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return ERR_TIMER(EDRV_PARAMETER);
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}
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return 0;
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}
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/**
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\brief Set timer.
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\param[in] instance timer instance to operate.
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\param[in] timeout the timeout value in microseconds(us).
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\return error code
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*/
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int32_t csi_timer_set_timeout(timer_handle_t handle, uint32_t timeout)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = handle;
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timer_priv->timeout = timeout;
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return 0;
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}
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/**
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\brief Start timer.
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\param[in] handle timer handle to operate.
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\return error code
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*/
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int32_t csi_timer_start(timer_handle_t handle, uint32_t apbfreq)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = handle;
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timer_priv->timeout_flag = 0;
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uint32_t min_us = apbfreq / 1000000;
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if ((timer_priv->timeout < min_us) || (timer_priv->timeout > 0xffffffff / min_us)) {
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return ERR_TIMER(EDRV_PARAMETER);
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}
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uint32_t load = (uint32_t)(timer_priv->timeout * min_us);
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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addr->TxLoadCount = load; /* load time(us) */
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addr->TxControl &= ~DW_TIMER_TXCONTROL_ENABLE; /* disable the timer */
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addr->TxControl |= DW_TIMER_TXCONTROL_ENABLE; /* enable the corresponding timer */
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addr->TxControl &= ~DW_TIMER_TXCONTROL_INTMASK; /* enable interrupt */
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return 0;
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}
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/**
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\brief Stop timer.
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\param[in] handle timer handle to operate.
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\return error code
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*/
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int32_t csi_timer_stop(timer_handle_t handle)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = handle;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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addr->TxControl |= DW_TIMER_TXCONTROL_INTMASK; /* enable interrupt */
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addr->TxControl &= ~DW_TIMER_TXCONTROL_ENABLE; /* disable the timer */
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return 0;
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}
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/**
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\brief suspend timer.
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\param[in] instance timer instance to operate.
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\return error code
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*/
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int32_t csi_timer_suspend(timer_handle_t handle)
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{
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TIMER_NULL_PARAM_CHK(handle);
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return ERR_TIMER(EDRV_UNSUPPORTED);
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}
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/**
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\brief resume timer.
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\param[in] handle timer handle to operate.
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\return error code
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*/
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int32_t csi_timer_resume(timer_handle_t handle)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = handle;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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addr->TxControl &= ~DW_TIMER_TXCONTROL_ENABLE; /* stop the corresponding timer */
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addr->TxControl &= DW_TIMER_TXCONTROL_ENABLE; /* restart the corresponding timer */
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return 0;
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}
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/**
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\brief get timer current value
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\param[in] handle timer handle to operate.
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\param[in] value timer current value
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\return error code
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*/
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int32_t csi_timer_get_current_value(timer_handle_t handle, uint32_t *value)
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{
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TIMER_NULL_PARAM_CHK(handle);
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dw_timer_priv_t *timer_priv = handle;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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*value = addr->TxCurrentValue;
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return 0;
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}
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/**
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\brief Get TIMER status.
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\param[in] handle timer handle to operate.
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\return TIMER status \ref timer_status_t
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*/
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timer_status_t csi_timer_get_status(timer_handle_t handle)
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{
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timer_status_t timer_status = {0};
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if (handle == NULL) {
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return timer_status;
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}
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dw_timer_priv_t *timer_priv = handle;
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dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base);
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if (addr->TxControl & DW_TIMER_TXCONTROL_ENABLE) {
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timer_status.active = 1;
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}
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if (timer_priv->timeout_flag == 1) {
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timer_status.timeout = 1;
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}
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return timer_status;
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}
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