613 lines
23 KiB
C
613 lines
23 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_lpi2c_edma.h"
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#include <stdlib.h>
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#include <string.h>
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.lpi2c_edma"
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#endif
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/* @brief Mask to align an address to 32 bytes. */
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#define ALIGN_32_MASK (0x1fU)
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/* ! @brief LPI2C master fifo commands. */
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enum _lpi2c_master_fifo_cmd
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{
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kTxDataCmd = LPI2C_MTDR_CMD(0x0U), /*!< Transmit DATA[7:0] */
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kRxDataCmd = LPI2C_MTDR_CMD(0X1U), /*!< Receive (DATA[7:0] + 1) bytes */
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kStopCmd = LPI2C_MTDR_CMD(0x2U), /*!< Generate STOP condition */
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kStartCmd = LPI2C_MTDR_CMD(0x4U), /*!< Generate(repeated) START and transmit address in DATA[[7:0] */
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};
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/*! @brief States for the state machine used by transactional APIs. */
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enum _lpi2c_transfer_states
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{
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kIdleState = 0,
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kSendCommandState,
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kIssueReadCommandState,
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kTransferDataState,
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kStopState,
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kWaitForCompletionState,
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};
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/*! @brief Typedef for interrupt handler. */
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typedef void (*lpi2c_isr_t)(LPI2C_Type *base, void *handle);
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Prepares the command buffer with the sequence of commands needed to send the requested transaction.
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* @param handle Master DMA driver handle.
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* @return Number of command words.
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*/
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static uint32_t LPI2C_GenerateCommands(lpi2c_master_edma_handle_t *handle);
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/*!
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* @brief DMA completion callback.
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* @param dmaHandle DMA channel handle for the channel that completed.
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* @param userData User data associated with the channel handle. For this callback, the user data is the
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* LPI2C DMA driver handle.
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* @param isTransferDone Whether the DMA transfer has completed.
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* @param tcds Number of TCDs that completed.
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*/
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static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, bool isTransferDone, uint32_t tcds);
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/*!
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* @brief LPI2C master edma transfer IRQ handle routine.
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*
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* This API handles the LPI2C bus error status and invoke callback if needed.
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*
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* @param base The LPI2C peripheral base address.
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* @param lpi2cMasterEdmaHandle Pointer to the LPI2C master edma handle.
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*/
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static void LPI2C_MasterTransferEdmaHandleIRQ(LPI2C_Type *base, void *lpi2cMasterEdmaHandle);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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static uint32_t lpi2c_edma_RecSetting = 0x02;
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*!
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* brief Create a new handle for the LPI2C master DMA APIs.
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*
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* The creation of a handle is for use with the DMA APIs. Once a handle
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* is created, there is not a corresponding destroy handle. If the user wants to
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* terminate a transfer, the LPI2C_MasterTransferAbortEDMA() API shall be called.
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*
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* For devices where the LPI2C send and receive DMA requests are OR'd together, the a txDmaHandle
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* parameter is ignored and may be set to NULL.
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*
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* param base The LPI2C peripheral base address.
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* param[out] handle Pointer to the LPI2C master driver handle.
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* param rxDmaHandle Handle for the eDMA receive channel. Created by the user prior to calling this function.
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* param txDmaHandle Handle for the eDMA transmit channel. Created by the user prior to calling this function.
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* param callback User provided pointer to the asynchronous callback function.
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* param userData User provided pointer to the application callback data.
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*/
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void LPI2C_MasterCreateEDMAHandle(LPI2C_Type *base,
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lpi2c_master_edma_handle_t *handle,
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edma_handle_t *rxDmaHandle,
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edma_handle_t *txDmaHandle,
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lpi2c_master_edma_transfer_callback_t callback,
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void *userData)
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{
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assert(handle != NULL);
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assert(rxDmaHandle != NULL);
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assert(txDmaHandle != NULL);
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/* Look up instance number */
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uint32_t instance = LPI2C_GetInstance(base);
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/* Clear out the handle. */
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(void)memset(handle, 0, sizeof(*handle));
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/* Set up the handle. For combined rx/tx DMA requests, the tx channel handle is set to the rx handle */
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/* in order to make the transfer API code simpler. */
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handle->base = base;
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handle->completionCallback = callback;
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handle->userData = userData;
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handle->rx = rxDmaHandle;
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handle->tx = (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) > 0) ? txDmaHandle : rxDmaHandle;
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/* Save the handle in global variables to support the double weak mechanism. */
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s_lpi2cMasterHandle[instance] = handle;
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/* Set LPI2C_MasterTransferEdmaHandleIRQ as LPI2C DMA IRQ handler */
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s_lpi2cMasterIsr = LPI2C_MasterTransferEdmaHandleIRQ;
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/* Enable interrupt in NVIC. */
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(void)EnableIRQ(kLpi2cIrqs[instance]);
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/* Set DMA channel completion callbacks. */
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EDMA_SetCallback(handle->rx, LPI2C_MasterEDMACallback, handle);
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if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) != 0)
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{
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EDMA_SetCallback(handle->tx, LPI2C_MasterEDMACallback, handle);
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}
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}
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static uint32_t LPI2C_GenerateCommands(lpi2c_master_edma_handle_t *handle)
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{
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lpi2c_master_transfer_t *xfer = &handle->transfer;
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uint16_t *cmd = (uint16_t *)&handle->commandBuffer;
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uint32_t cmdCount = 0;
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/* Handle no start option. */
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if ((xfer->flags & (uint32_t)kLPI2C_TransferNoStartFlag) != 0U)
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{
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if (xfer->direction == kLPI2C_Read)
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{
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/* Need to issue read command first. */
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cmd[cmdCount++] = (uint16_t)kRxDataCmd | (uint16_t)LPI2C_MTDR_DATA(xfer->dataSize - 1U);
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}
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}
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else
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{
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/*
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* Initial direction depends on whether a subaddress was provided, and of course the actual
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* data transfer direction.
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*/
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lpi2c_direction_t direction = (xfer->subaddressSize != 0U) ? kLPI2C_Write : xfer->direction;
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/* Start command. */
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cmd[cmdCount++] =
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(uint16_t)kStartCmd | (uint16_t)((uint16_t)((uint16_t)xfer->slaveAddress << 1U) | (uint16_t)direction);
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/* Subaddress, MSB first. */
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if (xfer->subaddressSize != 0U)
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{
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uint32_t subaddressRemaining = xfer->subaddressSize;
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while (0U != subaddressRemaining--)
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{
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uint8_t subaddressByte = (uint8_t)(xfer->subaddress >> (8U * subaddressRemaining)) & 0xffU;
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cmd[cmdCount++] = subaddressByte;
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}
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}
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/* Reads need special handling because we have to issue a read command and maybe a repeated start. */
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if ((xfer->dataSize != 0U) && (xfer->direction == kLPI2C_Read))
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{
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/* Need to send repeated start if switching directions to read. */
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if (direction == kLPI2C_Write)
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{
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cmd[cmdCount++] = (uint16_t)kStartCmd |
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(uint16_t)((uint16_t)((uint16_t)xfer->slaveAddress << 1U) | (uint16_t)kLPI2C_Read);
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}
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/* Read command. A single write to MTDR can issue read operation of 0xFFU + 1 byte of data at most, so when
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the dataSize is larger than 0x100U, push multiple read commands to MTDR until dataSize is reached. */
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size_t tmpRxSize = xfer->dataSize;
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while (tmpRxSize != 0U)
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{
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if (tmpRxSize > 256U)
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{
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cmd[cmdCount++] = (uint16_t)kRxDataCmd | (uint16_t)LPI2C_MTDR_DATA(0xFFU);
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tmpRxSize -= 256U;
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}
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else
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{
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cmd[cmdCount++] = (uint16_t)kRxDataCmd | (uint16_t)LPI2C_MTDR_DATA(tmpRxSize - 1U);
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tmpRxSize = 0U;
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}
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}
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}
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}
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return cmdCount;
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}
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/*!
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* brief Performs a non-blocking DMA-based transaction on the I2C bus.
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*
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* The callback specified when the a handle was created is invoked when the transaction has
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* completed.
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*
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* param base The LPI2C peripheral base address.
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* param handle Pointer to the LPI2C master driver handle.
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* param transfer The pointer to the transfer descriptor.
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* retval #kStatus_Success The transaction was started successfully.
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* retval #kStatus_LPI2C_Busy Either another master is currently utilizing the bus, or another DMA
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* transaction is already in progress.
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*/
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status_t LPI2C_MasterTransferEDMA(LPI2C_Type *base,
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lpi2c_master_edma_handle_t *handle,
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lpi2c_master_transfer_t *transfer)
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{
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status_t result;
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assert(handle != NULL);
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assert(transfer != NULL);
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assert(transfer->subaddressSize <= sizeof(transfer->subaddress));
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/* Check transfer data size in read operation. */
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/* A single write to MTDR can issue read operation of 0xFFU + 1 byte of data at most, so when the dataSize is larger
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than 0x100U, push multiple read commands to MTDR until dataSize is reached. LPI2C edma transfer uses linked
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descriptor to transfer command and data, the command buffer is stored in handle. Allocate 4 command words to
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carry read command which can cover nearly all use cases. */
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if ((transfer->direction == kLPI2C_Read) && (transfer->dataSize > (256U * 4U)))
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{
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return kStatus_InvalidArgument;
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}
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/* Return busy if another transaction is in progress. */
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if (handle->isBusy)
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{
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return kStatus_LPI2C_Busy;
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}
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/* Return an error if the bus is already in use not by us. */
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result = LPI2C_CheckForBusyBus(base);
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if (result != kStatus_Success)
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{
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return result;
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}
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/* We're now busy. */
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handle->isBusy = true;
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/* Disable LPI2C IRQ and DMA sources while we configure stuff. */
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LPI2C_MasterDisableInterrupts(base, (uint32_t)kLPI2C_MasterIrqFlags);
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LPI2C_MasterEnableDMA(base, false, false);
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/* Clear all flags. */
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LPI2C_MasterClearStatusFlags(base, (uint32_t)kLPI2C_MasterClearFlags);
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/* Save transfer into handle. */
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handle->transfer = *transfer;
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/* Generate commands to send. */
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uint32_t commandCount = LPI2C_GenerateCommands(handle);
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/* If the user is transmitting no data with no start or stop, then just go ahead and invoke the callback. */
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if ((0U == commandCount) && (transfer->dataSize == 0U))
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{
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if (handle->completionCallback != NULL)
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{
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handle->completionCallback(base, handle, kStatus_Success, handle->userData);
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}
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return kStatus_Success;
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}
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/* Reset DMA channels. */
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EDMA_ResetChannel(handle->rx->base, handle->rx->channel);
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if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) != 0)
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{
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EDMA_ResetChannel(handle->tx->base, handle->tx->channel);
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}
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/* Get a 32-byte aligned TCD pointer. */
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edma_tcd_t *tcd = (edma_tcd_t *)((uint32_t)(&handle->tcds[1]) & (~ALIGN_32_MASK));
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bool hasSendData = (transfer->direction == kLPI2C_Write) && (transfer->dataSize != 0U);
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bool hasReceiveData = (transfer->direction == kLPI2C_Read) && (transfer->dataSize != 0U);
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edma_transfer_config_t transferConfig;
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edma_tcd_t *linkTcd = NULL;
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/* Set up data transmit. */
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if (hasSendData)
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{
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uint32_t *srcAddr = (uint32_t *)transfer->data;
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transferConfig.srcAddr = (uint32_t)srcAddr;
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transferConfig.destAddr = (uint32_t)LPI2C_MasterGetTxFifoAddress(base);
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transferConfig.srcTransferSize = kEDMA_TransferSize1Bytes;
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transferConfig.destTransferSize = kEDMA_TransferSize1Bytes;
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transferConfig.srcOffset = (int16_t)sizeof(uint8_t);
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transferConfig.destOffset = 0;
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transferConfig.minorLoopBytes = sizeof(uint8_t); /* TODO optimize to fill fifo */
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transferConfig.majorLoopCounts = transfer->dataSize;
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/* Store the initially configured eDMA minor byte transfer count into the LPI2C handle */
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handle->nbytes = (uint8_t)transferConfig.minorLoopBytes;
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if (commandCount != 0U)
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{
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/* Create a software TCD, which will be chained after the commands. */
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EDMA_TcdReset(tcd);
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EDMA_TcdSetTransferConfig(tcd, &transferConfig, NULL);
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EDMA_TcdEnableInterrupts(tcd, (uint32_t)kEDMA_MajorInterruptEnable);
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linkTcd = tcd;
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}
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else
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{
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/* User is only transmitting data with no required commands, so this transfer can stand alone. */
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EDMA_SetTransferConfig(handle->tx->base, handle->tx->channel, &transferConfig, NULL);
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EDMA_EnableChannelInterrupts(handle->tx->base, handle->tx->channel, (uint32_t)kEDMA_MajorInterruptEnable);
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}
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}
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else if (hasReceiveData)
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{
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uint32_t *srcAddr = (uint32_t *)transfer->data;
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/* Set up data receive. */
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transferConfig.srcAddr = (uint32_t)LPI2C_MasterGetRxFifoAddress(base);
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transferConfig.destAddr = (uint32_t)srcAddr;
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transferConfig.srcTransferSize = kEDMA_TransferSize1Bytes;
|
||
|
|
transferConfig.destTransferSize = kEDMA_TransferSize1Bytes;
|
||
|
|
transferConfig.srcOffset = 0;
|
||
|
|
transferConfig.destOffset = (int16_t)sizeof(uint8_t);
|
||
|
|
transferConfig.minorLoopBytes = sizeof(uint8_t); /* TODO optimize to empty fifo */
|
||
|
|
transferConfig.majorLoopCounts = transfer->dataSize;
|
||
|
|
|
||
|
|
/* Store the initially configured eDMA minor byte transfer count into the LPI2C handle */
|
||
|
|
handle->nbytes = (uint8_t)transferConfig.minorLoopBytes;
|
||
|
|
|
||
|
|
if ((FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) != 0) || (0U == commandCount))
|
||
|
|
{
|
||
|
|
/* We can put this receive transfer on its own DMA channel. */
|
||
|
|
EDMA_SetTransferConfig(handle->rx->base, handle->rx->channel, &transferConfig, NULL);
|
||
|
|
EDMA_EnableChannelInterrupts(handle->rx->base, handle->rx->channel, (uint32_t)kEDMA_MajorInterruptEnable);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* For shared rx/tx DMA requests, when there are commands, create a software TCD of
|
||
|
|
enabling rx dma and disabling tx dma, which will be chained onto the commands transfer,
|
||
|
|
and create another software TCD of transfering data and chain it onto the last TCD.
|
||
|
|
Notice that in this situation assume tx/rx uses same channel */
|
||
|
|
EDMA_TcdReset(tcd);
|
||
|
|
EDMA_TcdSetTransferConfig(tcd, &transferConfig, NULL);
|
||
|
|
EDMA_TcdEnableInterrupts(tcd, (uint32_t)kEDMA_MajorInterruptEnable);
|
||
|
|
|
||
|
|
transferConfig.srcAddr = (uint32_t)&lpi2c_edma_RecSetting;
|
||
|
|
transferConfig.destAddr = (uint32_t) & (base->MDER);
|
||
|
|
transferConfig.srcTransferSize = kEDMA_TransferSize1Bytes;
|
||
|
|
transferConfig.destTransferSize = kEDMA_TransferSize1Bytes;
|
||
|
|
transferConfig.srcOffset = 0;
|
||
|
|
transferConfig.destOffset = (int16_t)sizeof(uint8_t);
|
||
|
|
transferConfig.minorLoopBytes = sizeof(uint8_t);
|
||
|
|
transferConfig.majorLoopCounts = 1;
|
||
|
|
|
||
|
|
edma_tcd_t *tcdSetRxClearTxDMA = (edma_tcd_t *)((uint32_t)(&handle->tcds[2]) & (~ALIGN_32_MASK));
|
||
|
|
|
||
|
|
EDMA_TcdReset(tcdSetRxClearTxDMA);
|
||
|
|
EDMA_TcdSetTransferConfig(tcdSetRxClearTxDMA, &transferConfig, tcd);
|
||
|
|
linkTcd = tcdSetRxClearTxDMA;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* No data to send */
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Set up commands transfer. */
|
||
|
|
if (commandCount != 0U)
|
||
|
|
{
|
||
|
|
transferConfig.srcAddr = (uint32_t)handle->commandBuffer;
|
||
|
|
transferConfig.destAddr = (uint32_t)LPI2C_MasterGetTxFifoAddress(base);
|
||
|
|
transferConfig.srcTransferSize = kEDMA_TransferSize2Bytes;
|
||
|
|
transferConfig.destTransferSize = kEDMA_TransferSize2Bytes;
|
||
|
|
transferConfig.srcOffset = (int16_t)sizeof(uint16_t);
|
||
|
|
transferConfig.destOffset = 0;
|
||
|
|
transferConfig.minorLoopBytes = sizeof(uint16_t); /* TODO optimize to fill fifo */
|
||
|
|
transferConfig.majorLoopCounts = commandCount;
|
||
|
|
|
||
|
|
EDMA_SetTransferConfig(handle->tx->base, handle->tx->channel, &transferConfig, linkTcd);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Start DMA transfer. */
|
||
|
|
if (hasReceiveData || (0 == FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base)))
|
||
|
|
{
|
||
|
|
EDMA_StartTransfer(handle->rx);
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((hasSendData || (commandCount != 0U)) && (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) != 0))
|
||
|
|
{
|
||
|
|
EDMA_StartTransfer(handle->tx);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Enable DMA in both directions. This actually kicks of the transfer. */
|
||
|
|
LPI2C_MasterEnableDMA(base, true, true);
|
||
|
|
|
||
|
|
/* Enable all LPI2C master interrupts */
|
||
|
|
LPI2C_MasterEnableInterrupts(base,
|
||
|
|
(uint32_t)kLPI2C_MasterArbitrationLostFlag | (uint32_t)kLPI2C_MasterNackDetectFlag |
|
||
|
|
(uint32_t)kLPI2C_MasterPinLowTimeoutFlag | (uint32_t)kLPI2C_MasterFifoErrFlag);
|
||
|
|
|
||
|
|
return result;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Returns number of bytes transferred so far.
|
||
|
|
*
|
||
|
|
* param base The LPI2C peripheral base address.
|
||
|
|
* param handle Pointer to the LPI2C master driver handle.
|
||
|
|
* param[out] count Number of bytes transferred so far by the non-blocking transaction.
|
||
|
|
* retval #kStatus_Success
|
||
|
|
* retval #kStatus_NoTransferInProgress There is not a DMA transaction currently in progress.
|
||
|
|
*/
|
||
|
|
status_t LPI2C_MasterTransferGetCountEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, size_t *count)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
if (NULL == count)
|
||
|
|
{
|
||
|
|
return kStatus_InvalidArgument;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Catch when there is not an active transfer. */
|
||
|
|
if (!handle->isBusy)
|
||
|
|
{
|
||
|
|
*count = 0;
|
||
|
|
return kStatus_NoTransferInProgress;
|
||
|
|
}
|
||
|
|
|
||
|
|
uint32_t remaining = handle->transfer.dataSize;
|
||
|
|
|
||
|
|
/* If the DMA is still on a commands transfer that chains to the actual data transfer, */
|
||
|
|
/* we do nothing and return the number of transferred bytes as zero. */
|
||
|
|
if (EDMA_GetNextTCDAddress(handle->tx) == 0U)
|
||
|
|
{
|
||
|
|
if (handle->transfer.direction == kLPI2C_Write)
|
||
|
|
{
|
||
|
|
remaining =
|
||
|
|
(uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->tx->base, handle->tx->channel);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
remaining =
|
||
|
|
(uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->rx->base, handle->rx->channel);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
*count = handle->transfer.dataSize - remaining;
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Terminates a non-blocking LPI2C master transmission early.
|
||
|
|
*
|
||
|
|
* note It is not safe to call this function from an IRQ handler that has a higher priority than the
|
||
|
|
* eDMA peripheral's IRQ priority.
|
||
|
|
*
|
||
|
|
* param base The LPI2C peripheral base address.
|
||
|
|
* param handle Pointer to the LPI2C master driver handle.
|
||
|
|
* retval #kStatus_Success A transaction was successfully aborted.
|
||
|
|
* retval #kStatus_LPI2C_Idle There is not a DMA transaction currently in progress.
|
||
|
|
*/
|
||
|
|
status_t LPI2C_MasterTransferAbortEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle)
|
||
|
|
{
|
||
|
|
/* Catch when there is not an active transfer. */
|
||
|
|
if (!handle->isBusy)
|
||
|
|
{
|
||
|
|
return kStatus_LPI2C_Idle;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Terminate DMA transfers. */
|
||
|
|
EDMA_AbortTransfer(handle->rx);
|
||
|
|
if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) != 0)
|
||
|
|
{
|
||
|
|
EDMA_AbortTransfer(handle->tx);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Reset fifos. */
|
||
|
|
base->MCR |= LPI2C_MCR_RRF_MASK | LPI2C_MCR_RTF_MASK;
|
||
|
|
|
||
|
|
/* Disable LPI2C interrupts. */
|
||
|
|
LPI2C_MasterDisableInterrupts(base, (uint32_t)kLPI2C_MasterIrqFlags);
|
||
|
|
|
||
|
|
/* If master is still busy and has not send out stop signal yet. */
|
||
|
|
if ((LPI2C_MasterGetStatusFlags(base) &
|
||
|
|
((uint32_t)kLPI2C_MasterStopDetectFlag | (uint32_t)kLPI2C_MasterBusyFlag)) == (uint32_t)kLPI2C_MasterBusyFlag)
|
||
|
|
{
|
||
|
|
/* Send a stop command to finalize the transfer. */
|
||
|
|
base->MTDR = (uint32_t)kStopCmd;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Reset handle. */
|
||
|
|
handle->isBusy = false;
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, bool isTransferDone, uint32_t tcds)
|
||
|
|
{
|
||
|
|
lpi2c_master_edma_handle_t *handle = (lpi2c_master_edma_handle_t *)userData;
|
||
|
|
|
||
|
|
if (NULL == handle)
|
||
|
|
{
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check for errors. */
|
||
|
|
status_t result = LPI2C_MasterCheckAndClearError(handle->base, LPI2C_MasterGetStatusFlags(handle->base));
|
||
|
|
|
||
|
|
/* Done with this transaction. */
|
||
|
|
handle->isBusy = false;
|
||
|
|
|
||
|
|
if (0U == (handle->transfer.flags & (uint32_t)kLPI2C_TransferNoStopFlag))
|
||
|
|
{
|
||
|
|
/* Send a stop command to finalize the transfer. */
|
||
|
|
handle->base->MTDR = (uint32_t)kStopCmd;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Invoke callback. */
|
||
|
|
if (handle->completionCallback != NULL)
|
||
|
|
{
|
||
|
|
handle->completionCallback(handle->base, handle, result, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void LPI2C_MasterTransferEdmaHandleIRQ(LPI2C_Type *base, void *lpi2cMasterEdmaHandle)
|
||
|
|
{
|
||
|
|
assert(lpi2cMasterEdmaHandle != NULL);
|
||
|
|
|
||
|
|
lpi2c_master_edma_handle_t *handle = (lpi2c_master_edma_handle_t *)lpi2cMasterEdmaHandle;
|
||
|
|
uint32_t status = LPI2C_MasterGetStatusFlags(base);
|
||
|
|
status_t result = kStatus_Success;
|
||
|
|
|
||
|
|
/* Terminate DMA transfers. */
|
||
|
|
EDMA_AbortTransfer(handle->rx);
|
||
|
|
if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) != 0)
|
||
|
|
{
|
||
|
|
EDMA_AbortTransfer(handle->tx);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Done with this transaction. */
|
||
|
|
handle->isBusy = false;
|
||
|
|
|
||
|
|
/* Disable LPI2C interrupts. */
|
||
|
|
LPI2C_MasterDisableInterrupts(base, (uint32_t)kLPI2C_MasterIrqFlags);
|
||
|
|
|
||
|
|
/* Check error status */
|
||
|
|
if (0U != (status & (uint32_t)kLPI2C_MasterPinLowTimeoutFlag))
|
||
|
|
{
|
||
|
|
result = kStatus_LPI2C_PinLowTimeout;
|
||
|
|
}
|
||
|
|
else if (0U != (status & (uint32_t)kLPI2C_MasterArbitrationLostFlag))
|
||
|
|
{
|
||
|
|
result = kStatus_LPI2C_ArbitrationLost;
|
||
|
|
}
|
||
|
|
else if (0U != (status & (uint32_t)kLPI2C_MasterNackDetectFlag))
|
||
|
|
{
|
||
|
|
result = kStatus_LPI2C_Nak;
|
||
|
|
}
|
||
|
|
else if (0U != (status & (uint32_t)kLPI2C_MasterFifoErrFlag))
|
||
|
|
{
|
||
|
|
result = kStatus_LPI2C_FifoError;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
; /* Intentional empty */
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Clear error status. */
|
||
|
|
(void)LPI2C_MasterCheckAndClearError(base, status);
|
||
|
|
|
||
|
|
/* Send stop flag if needed */
|
||
|
|
if (0U == (handle->transfer.flags & (uint32_t)kLPI2C_TransferNoStopFlag))
|
||
|
|
{
|
||
|
|
status = LPI2C_MasterGetStatusFlags(base);
|
||
|
|
/* If bus is still busy and the master has not generate stop flag */
|
||
|
|
if ((status & ((uint32_t)kLPI2C_MasterBusBusyFlag | (uint32_t)kLPI2C_MasterStopDetectFlag)) ==
|
||
|
|
(uint32_t)kLPI2C_MasterBusBusyFlag)
|
||
|
|
{
|
||
|
|
/* Send a stop command to finalize the transfer. */
|
||
|
|
handle->base->MTDR = (uint32_t)kStopCmd;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Invoke callback. */
|
||
|
|
if (handle->completionCallback != NULL)
|
||
|
|
{
|
||
|
|
handle->completionCallback(base, handle, result, handle->userData);
|
||
|
|
}
|
||
|
|
}
|