rt-thread/bsp/cypress/libraries/HAL_Drivers/drv_log.h

/*
 * Copyright (c) 2006-2022, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2018-11-15     SummerGift   first version
 */

/*
 * NOTE: DO NOT include this file on the header file.
 */

#ifndef LOG_TAG
    #define DBG_TAG               "drv"
#else
    #define DBG_TAG               LOG_TAG
#endif /* LOG_TAG */

#ifdef DRV_DEBUG
    #define DBG_LVL               DBG_LOG
#else
    #define DBG_LVL               DBG_INFO
#endif /* DRV_DEBUG */

#include <rtdbg.h>
The first submit CY8CKIT-062S2-43012 project 2022-07-05 16:45:32 +08:00			`/*`
format code 2022-07-05 16:59:20 +08:00			`* Copyright (c) 2006-2022, RT-Thread Development Team`
The first submit CY8CKIT-062S2-43012 project 2022-07-05 16:45:32 +08:00			`*`
			`* SPDX-License-Identifier: Apache-2.0`
			`*`
			`* Change Logs:`
			`* Date Author Notes`
			`* 2018-11-15 SummerGift first version`
			`*/`

			`/*`
			`* NOTE: DO NOT include this file on the header file.`
			`*/`

			`#ifndef LOG_TAG`
Add Onchip flash 2022-07-27 15:41:25 +08:00			`#define DBG_TAG "drv"`
The first submit CY8CKIT-062S2-43012 project 2022-07-05 16:45:32 +08:00			`#else`
Add Onchip flash 2022-07-27 15:41:25 +08:00			`#define DBG_TAG LOG_TAG`
The first submit CY8CKIT-062S2-43012 project 2022-07-05 16:45:32 +08:00			`#endif /* LOG_TAG */`

			`#ifdef DRV_DEBUG`
Add Onchip flash 2022-07-27 15:41:25 +08:00			`#define DBG_LVL DBG_LOG`
The first submit CY8CKIT-062S2-43012 project 2022-07-05 16:45:32 +08:00			`#else`
Add Onchip flash 2022-07-27 15:41:25 +08:00			`#define DBG_LVL DBG_INFO`
The first submit CY8CKIT-062S2-43012 project 2022-07-05 16:45:32 +08:00			`#endif /* DRV_DEBUG */`

			`#include <rtdbg.h>`