383 lines
12 KiB
C
383 lines
12 KiB
C
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/*!
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\file gd32f3x0_ctc.c
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\brief CTC driver
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\version 2017-06-06, V1.0.0, firmware for GD32F3x0
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\version 2019-06-01, V2.0.0, firmware for GD32F3x0
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*/
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/*
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Copyright (c) 2019, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32f3x0_ctc.h"
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#define CTC_FLAG_MASK ((uint32_t)0x00000700U)
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/*!
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\brief reset CTC clock trim controller
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ctc_deinit(void)
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{
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/* reset CTC */
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rcu_periph_reset_enable(RCU_CTCRST);
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rcu_periph_reset_disable(RCU_CTCRST);
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}
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/*!
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\brief configure reference signal source polarity
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\param[in] polarity:
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only one parameter can be selected which is shown as below:
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\arg CTC_REFSOURCE_POLARITY_FALLING: reference signal source polarity is falling edge
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\arg CTC_REFSOURCE_POLARITY_RISING: reference signal source polarity is rising edge
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\param[out] none
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\retval none
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*/
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void ctc_refsource_polarity_config(uint32_t polarity)
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{
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CTC_CTL1 &= (uint32_t)(~CTC_CTL1_REFPOL);
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CTC_CTL1 |= (uint32_t)polarity;
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}
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/*!
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\brief select reference signal source
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\param[in] refs:
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only one parameter can be selected which is shown as below:
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\arg CTC_REFSOURCE_GPIO: GPIO is selected
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\arg CTC_REFSOURCE_LXTAL: LXTAL is clock selected
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\arg CTC_REFSOURCE_USBSOF: USBSOF is selected
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\param[out] none
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\retval none
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*/
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void ctc_refsource_signal_select(uint32_t refs)
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{
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CTC_CTL1 &= (uint32_t)(~CTC_CTL1_REFSEL);
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CTC_CTL1 |= (uint32_t)refs;
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}
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/*!
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\brief configure reference signal source prescaler
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\param[in] prescaler:
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only one parameter can be selected which is shown as below:
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\arg CTC_REFSOURCE_PSC_OFF: reference signal not divided
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\arg CTC_REFSOURCE_PSC_DIV2: reference signal divided by 2
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\arg CTC_REFSOURCE_PSC_DIV4: reference signal divided by 4
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\arg CTC_REFSOURCE_PSC_DIV8: reference signal divided by 8
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\arg CTC_REFSOURCE_PSC_DIV16: reference signal divided by 16
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\arg CTC_REFSOURCE_PSC_DIV32: reference signal divided by 32
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\arg CTC_REFSOURCE_PSC_DIV64: reference signal divided by 64
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\arg CTC_REFSOURCE_PSC_DIV128: reference signal divided by 128
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\param[out] none
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\retval none
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*/
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void ctc_refsource_prescaler_config(uint32_t prescaler)
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{
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CTC_CTL1 &= (uint32_t)(~CTC_CTL1_REFPSC);
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CTC_CTL1 |= (uint32_t)prescaler;
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}
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/*!
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\brief configure clock trim base limit value
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\param[in] limit_value: 8-bit clock trim base limit value
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\arg 0x00-0xFF
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\param[out] none
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\retval none
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*/
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void ctc_clock_limit_value_config(uint8_t limit_value)
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{
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CTC_CTL1 &= (uint32_t)(~CTC_CTL1_CKLIM);
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CTC_CTL1 |= CTL1_CKLIM(limit_value);
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}
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/*!
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\brief configure CTC counter reload value
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\param[in] reload_value: 16-bit CTC counter reload value
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\arg 0x0000-0xFFFF
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\param[out] none
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\retval none
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*/
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void ctc_counter_reload_value_config(uint16_t reload_value)
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{
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CTC_CTL1 &= (uint32_t)(~CTC_CTL1_RLVALUE);
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CTC_CTL1 |= (uint32_t)reload_value;
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}
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/*!
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\brief enable CTC trim counter
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ctc_counter_enable(void)
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{
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CTC_CTL0 |= (uint32_t)CTC_CTL0_CNTEN;
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}
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/*!
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\brief disable CTC trim counter
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ctc_counter_disable(void)
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{
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CTC_CTL0 &= (uint32_t)(~CTC_CTL0_CNTEN);
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}
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/*!
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\brief configure the IRC48M trim value
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\param[in] trim_value: 8-bit IRC48M trim value
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\arg 0x00-0x3F
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\param[out] none
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\retval none
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*/
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void ctc_irc48m_trim_value_config(uint8_t trim_value)
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{
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/* clear TRIMVALUE bits */
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CTC_CTL0 &= (~(uint32_t)CTC_CTL0_TRIMVALUE);
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/* set TRIMVALUE bits */
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CTC_CTL0 |= CTL0_TRIMVALUE(trim_value);
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}
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/*!
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\brief generate software reference source sync pulse
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ctc_software_refsource_pulse_generate(void)
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{
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CTC_CTL0 |= (uint32_t)CTC_CTL0_SWREFPUL;
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}
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/*!
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\brief configure hardware automatically trim mode
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\param[in] hardmode:
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only one parameter can be selected which is shown as below:
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\arg CTC_HARDWARE_TRIM_MODE_ENABLE: hardware automatically trim mode enable
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\arg CTC_HARDWARE_TRIM_MODE_DISABLE: hardware automatically trim mode disable
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\param[out] none
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\retval none
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*/
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void ctc_hardware_trim_mode_config(uint32_t hardmode)
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{
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CTC_CTL0 &= (uint32_t)(~CTC_CTL0_AUTOTRIM);
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CTC_CTL0 |= (uint32_t)hardmode;
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}
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/*!
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\brief read CTC counter capture value when reference sync pulse occurred
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\param[in] none
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\param[out] none
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\retval the 16-bit CTC counter capture value
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*/
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uint16_t ctc_counter_capture_value_read(void)
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{
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uint16_t capture_value = 0U;
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capture_value = (uint16_t)GET_STAT_REFCAP(CTC_STAT);
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return (capture_value);
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}
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/*!
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\brief read CTC trim counter direction when reference sync pulse occurred
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\param[in] none
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\param[out] none
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\retval FlagStatus: SET or RESET
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\arg SET: CTC trim counter direction is down-counting
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\arg RESET: CTC trim counter direction is up-counting
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*/
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FlagStatus ctc_counter_direction_read(void)
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{
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FlagStatus ret_status = RESET;
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if(RESET != (CTC_STAT & CTC_STAT_REFDIR)){
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ret_status = SET;
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}
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return ret_status;
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}
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/*!
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\brief read CTC counter reload value
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\param[in] none
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\param[out] none
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\retval the 16-bit CTC counter reload value
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*/
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uint16_t ctc_counter_reload_value_read(void)
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{
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uint16_t reload_value = 0U;
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reload_value = (uint16_t)(CTC_CTL1 & CTC_CTL1_RLVALUE);
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return (reload_value);
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}
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/*!
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\brief read the IRC48M trim value
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\param[in] none
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\param[out] none
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\retval the 8-bit IRC48M trim value
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*/
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uint8_t ctc_irc48m_trim_value_read(void)
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{
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uint8_t trim_value = 0U;
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trim_value = (uint8_t)GET_CTL0_TRIMVALUE(CTC_CTL0);
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return (trim_value);
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}
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/*!
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\brief enable the CTC interrupt
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\param[in] interrupt: CTC interrupt enable
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one or more parameters can be selected which are shown as below:
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\arg CTC_INT_CKOK: clock trim OK interrupt enable
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\arg CTC_INT_CKWARN: clock trim warning interrupt enable
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\arg CTC_INT_ERR: error interrupt enable
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\arg CTC_INT_EREF: expect reference interrupt enable
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\param[out] none
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\retval none
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*/
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void ctc_interrupt_enable(uint32_t interrupt)
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{
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CTC_CTL0 |= (uint32_t)interrupt;
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}
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/*!
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\brief disable the CTC interrupt
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\param[in] interrupt: CTC interrupt enable source
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one or more parameters can be selected which are shown as below:
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\arg CTC_INT_CKOK: clock trim OK interrupt enable
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\arg CTC_INT_CKWARN: clock trim warning interrupt enable
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\arg CTC_INT_ERR: error interrupt enable
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\arg CTC_INT_EREF: expect reference interrupt enable
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\param[out] none
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\retval none
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*/
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void ctc_interrupt_disable(uint32_t interrupt)
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{
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CTC_CTL0 &= (uint32_t)(~(interrupt));
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}
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/*!
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\brief get CTC flag
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\param[in] flag: the CTC flag
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only one parameter can be selected which is shown as below:
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\arg CTC_FLAG_CKOK: clock trim OK flag
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\arg CTC_FLAG_CKWARN: clock trim warning flag
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\arg CTC_FLAG_ERR: error flag
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\arg CTC_FLAG_EREF: expect reference flag
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\arg CTC_FLAG_CKERR: clock trim error bit
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\arg CTC_FLAG_REFMISS: reference sync pulse miss
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\arg CTC_FLAG_TRIMERR: trim value error bit
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus ctc_flag_get(uint32_t flag)
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{
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FlagStatus ret_status = RESET;
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if(RESET != (CTC_STAT & flag)){
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ret_status = SET;
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}
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return ret_status;
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}
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/*!
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\brief clear CTC flag
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\param[in] flag: the CTC flag
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only one parameter can be selected which is shown as below:
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\arg CTC_FLAG_CKOK: clock trim OK flag
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\arg CTC_FLAG_CKWARN: clock trim warning flag
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\arg CTC_FLAG_ERR: error flag
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\arg CTC_FLAG_EREF: expect reference flag
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\arg CTC_FLAG_CKERR: clock trim error bit
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\arg CTC_FLAG_REFMISS: reference sync pulse miss
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\arg CTC_FLAG_TRIMERR: trim value error bit
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\param[out] none
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\retval none
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*/
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void ctc_flag_clear(uint32_t flag)
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{
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if(flag & CTC_FLAG_MASK){
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CTC_INTC |= CTC_INTC_ERRIC;
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}else{
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CTC_INTC |= flag;
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}
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}
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/*!
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\brief get CTC interrupt flag
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\param[in] interrupt: the CTC interrupt flag
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only one parameter can be selected which is shown as below:
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\arg CTC_INT_FLAG_CKOK: clock trim OK interrupt
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\arg CTC_INT_FLAG_CKWARN: clock trim warning interrupt
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\arg CTC_INT_FLAG_ERR: error interrupt
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\arg CTC_INT_FLAG_EREF: expect reference interrupt
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\arg CTC_INT_FLAG_CKERR: clock trim error bit interrupt
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\arg CTC_INT_FLAG_REFMISS: reference sync pulse miss interrupt
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\arg CTC_INT_FLAG_TRIMERR: trim value error interrupt
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus ctc_interrupt_flag_get(uint32_t interrupt)
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{
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uint32_t ctc_int = 0U, intenable = 0U;
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FlagStatus ret_status = RESET;
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if(interrupt & CTC_FLAG_MASK){
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intenable = CTC_CTL0 & CTC_INT_ERR;
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}else{
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intenable = CTC_CTL0 & interrupt;
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}
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ctc_int = CTC_STAT & interrupt;
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if(ctc_int && intenable){
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ret_status = SET;
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}
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return ret_status;
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}
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/*!
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\brief clear CTC interrupt flag
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\param[in] interrupt: the CTC interrupt flag
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only one parameter can be selected which is shown as below:
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\arg CTC_INT_FLAG_CKOK: clock trim OK interrupt
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\arg CTC_INT_FLAG_CKWARN: clock trim warning interrupt
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\arg CTC_INT_FLAG_ERR: error interrupt
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\arg CTC_INT_FLAG_EREF: expect reference interrupt
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\arg CTC_INT_FLAG_CKERR: clock trim error bit interrupt
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\arg CTC_INT_FLAG_REFMISS: reference sync pulse miss interrupt
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\arg CTC_INT_FLAG_TRIMERR: trim value error interrupt
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\param[out] none
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|
\retval none
|
||
|
|
*/
|
||
|
|
void ctc_interrupt_flag_clear(uint32_t interrupt)
|
||
|
|
{
|
||
|
|
if(interrupt & CTC_FLAG_MASK){
|
||
|
|
CTC_INTC |= CTC_INTC_ERRIC;
|
||
|
|
}else{
|
||
|
|
CTC_INTC |= interrupt;
|
||
|
|
}
|
||
|
|
}
|