2023-03-23 20:06:50 +08:00
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-07-27 flybreak the first version
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*/
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#include <rtthread.h>
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2023-06-29 00:04:06 +08:00
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#if defined (__IAR_SYSTEMS_ICC__) /* for IAR Compiler */
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#include <intrinsics.h>
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#endif
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2023-03-23 20:06:50 +08:00
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/**
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\brief LDR Exclusive (32 bit)
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\details Executes a exclusive LDR instruction for 32 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint32_t at (*ptr)
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*/
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#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
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#define __LDREXW (rt_atomic_t)__builtin_arm_ldrex
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#elif defined(__ARMCC_VERSION) /* ARM Compiler V5 */
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#if __ARMCC_VERSION < 5060020
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#define __LDREXW(ptr) ((rt_atomic_t ) __ldrex(ptr))
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#else
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#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((rt_atomic_t ) __ldrex(ptr)) _Pragma("pop")
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#endif
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#elif defined (__IAR_SYSTEMS_ICC__) /* for IAR Compiler */
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2023-04-27 07:09:38 +08:00
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_Pragma("inline=forced") __intrinsic rt_atomic_t __LDREXW(volatile rt_atomic_t *ptr)
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2023-03-23 20:06:50 +08:00
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{
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2023-06-29 00:04:06 +08:00
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return __LDREX((unsigned int *)ptr);
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2023-03-23 20:06:50 +08:00
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}
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#elif defined (__GNUC__) /* GNU GCC Compiler */
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__attribute__((always_inline)) static inline rt_atomic_t __LDREXW(volatile rt_atomic_t *addr)
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{
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rt_atomic_t result;
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__asm volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
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return result;
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}
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#endif
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/**
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\brief STR Exclusive (32 bit)
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\details Executes a exclusive STR instruction for 32 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
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#define __STREXW (rt_atomic_t)__builtin_arm_strex
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#elif defined(__ARMCC_VERSION) /* ARM Compiler V5 */
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#if __ARMCC_VERSION < 5060020
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#define __STREXW(value, ptr) __strex(value, ptr)
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#else
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#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
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#endif
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#elif defined (__IAR_SYSTEMS_ICC__) /* for IAR Compiler */
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_Pragma("inline=forced") __intrinsic rt_atomic_t __STREXW(rt_atomic_t value, volatile rt_atomic_t *ptr)
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{
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2023-06-29 00:04:06 +08:00
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return __STREX(value, (unsigned int *)ptr);
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2023-03-23 20:06:50 +08:00
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}
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#elif defined (__GNUC__) /* GNU GCC Compiler */
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__attribute__((always_inline)) static inline rt_atomic_t __STREXW(volatile rt_atomic_t value, volatile rt_atomic_t *addr)
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{
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rt_atomic_t result;
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__asm volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
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return result;
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}
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#endif
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rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(oldval, ptr)) != 0U);
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2023-03-30 11:06:21 +08:00
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return oldval;
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2023-03-23 20:06:50 +08:00
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}
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void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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do
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{
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__LDREXW(ptr);
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} while ((__STREXW(val, ptr)) != 0U);
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}
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rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(oldval + val, ptr)) != 0U);
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return oldval;
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}
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rt_atomic_t rt_hw_atomic_sub(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(oldval - val, ptr)) != 0U);
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return oldval;
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}
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rt_atomic_t rt_hw_atomic_and(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(oldval & val, ptr)) != 0U);
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return oldval;
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}
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rt_atomic_t rt_hw_atomic_or(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(oldval | val, ptr)) != 0U);
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return oldval;
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}
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rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(oldval ^ val, ptr)) != 0U);
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return oldval;
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}
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rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(val, ptr)) != 0U);
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return oldval;
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}
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void rt_hw_atomic_flag_clear(volatile rt_atomic_t *ptr)
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{
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do
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{
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__LDREXW(ptr);
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} while ((__STREXW(0, ptr)) != 0U);
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}
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rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr)
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{
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rt_atomic_t oldval;
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do
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{
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oldval = __LDREXW(ptr);
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} while ((__STREXW(1, ptr)) != 0U);
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return oldval;
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}
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2023-05-20 23:41:29 +08:00
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rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t new)
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2023-03-23 20:06:50 +08:00
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{
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rt_atomic_t result;
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rt_atomic_t temp = *old;
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do
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{
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result = __LDREXW(ptr);
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if (result != temp)
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{
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*old = result;
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__STREXW(result, ptr);
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break;
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}
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} while ((__STREXW(new, ptr)) != 0U);
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return (result == temp);
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}
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