rt-thread/bsp/gd32450z-eval/drivers/board.c

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2017-08-22 15:52:57 +08:00
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#include <gd32f4xx.h>
#include <board.h>
#include <drv_usart.h>
void _init(void)
{
}
/**
* @brief This function is executed in case of error occurrence.
* @param None
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler */
/* User can add his own implementation to report the HAL error return state */
while(1)
{
}
/* USER CODE END Error_Handler */
}
/** System Clock Configuration
*/
void SystemClock_Config(void)
{
// RCC_OscInitTypeDef RCC_OscInitStruct;
// RCC_ClkInitTypeDef RCC_ClkInitStruct;
// RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
// __HAL_RCC_PWR_CLK_ENABLE();
// __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
// RCC_OscInitStruct.HSEState = RCC_HSE_ON;
// RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
// RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
// RCC_OscInitStruct.PLL.PLLM = 25;
// RCC_OscInitStruct.PLL.PLLN = 360;
// RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
// RCC_OscInitStruct.PLL.PLLQ = 8;
// if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
// {
// Error_Handler();
// }
// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
// |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
// RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
// if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
// {
// Error_Handler();
// }
// PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
// PeriphClkInitStruct.PLLSAI.PLLSAIN = 260;
// PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
// PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
// if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
// {
// Error_Handler();
// }
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
NVIC_SetPriority(SysTick_IRQn, 0);
}
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/**
* This function will initial GD32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
#define NVIC_VTOR_MASK 0x3FFFFF80
#ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x10000000 */
SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
#else /* VECT_TAB_FLASH */
/* Set the Vector Table base location at 0x08000000 */
SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK);
#endif
SystemClock_Config();
#ifdef RT_USING_CONSOLE
rt_console_set_device(CONSOLE_DEVICE);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#else
SDRAM_Init();
mpu_init();
#endif
}
/*@}*/