242 lines
8.5 KiB
Plaintext
242 lines
8.5 KiB
Plaintext
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/*******************************************************************************
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* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
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*
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* file name : production-smartfusion2-execute-in-place.ld
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* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
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* image executing in SmartFusion2 internal eNVM.
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*
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* Some current (April 2015) dev kit memory map possibilities are
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* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
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* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
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* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
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* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
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* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
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* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
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* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
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* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
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* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
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* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
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* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
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* --Some older physical memory map possibilities are
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* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
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* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
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* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
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*
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* Example linker scripts use lowest practicl values so will work accross dev kits
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* eNVM=256KB eRAM=64KB External memory = 64MB
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*
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* On reset, the eNVM region is mapped to 0x00000000
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* This is changed below by setting the __smartfusion2_memory_remap variable as required.
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* Options are detailed below.
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*
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* SVN $Revision: 7454 $
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* SVN $Date: 2015-06-08 20:28:07 +0530 (Mon, 08 Jun 2015) $
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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GROUP(-lc -lgcc -lm)
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OUTPUT_ARCH(arm)
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ENTRY(Reset_Handler)
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SEARCH_DIR(.)
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__DYNAMIC = 0;
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/*******************************************************************************
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* Start of board customization.
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*******************************************************************************/
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MEMORY
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{
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/*
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* In general, example LD scripts use lowest common memory footprint
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* so will work with all devices.
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*/
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/*
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* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
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* the name of the type of flash memory are all in a specific order.
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* Please do not modify that comment line, in order to ensure
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* debugging of your application will use the flash memory correctly.
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*/
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/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
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rom (rx) : ORIGIN = 0x00000000, LENGTH = 256k
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/* SmartFusion2 internal eSRAM */
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
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}
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RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
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RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
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MAIN_STACK_SIZE = 4k; /* Cortex main stack size. */
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MIN_SIZE_HEAP = 4k; /* needs to be calculated for your application */
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/*******************************************************************************
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* End of board customization.
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*******************************************************************************/
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PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
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PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
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PROVIDE (_estack = __main_stack_start);
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PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
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/*
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* Remap instruction for startup code and debugger:
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* 0: remap eNVM to address 0x00000000
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* 1: remap eSRAM to address 0x00000000
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* 2: remap external DDR memory to address 0x00000000
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*/
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PROVIDE (__smartfusion2_memory_remap = 0);
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SECTIONS
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{
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.vector_table :
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{
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__vector_table_load = LOADADDR(.vector_table);
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__vector_table_start = .;
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__vector_table_vma_base_address = .;
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KEEP(*(.isr_vector))
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. = ALIGN(0x10);
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_evector_table = .;
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} >rom
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.boot_code : ALIGN(0x10) /* When all code in NVRAM, no requirement for this section- but adds clarity when looking at .lst file */
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{
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*(.boot_code)
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. = ALIGN(0x10);
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} >rom
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.text : ALIGN(0x10)
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{
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CREATE_OBJECT_SYMBOLS
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__text_load = LOADADDR(.text);
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__text_start = .;
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*(.text .text.* .gnu.linkonce.t.*)
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*(.plt)
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*(.gnu.warning)
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*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
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. = ALIGN(0x4);
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/* These are for running static constructors and destructors under ELF. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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*(.gcc_except_table)
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*(.eh_frame_hdr)
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*(.eh_frame)
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KEEP (*(.vector_table))
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KEEP (*(.init))
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KEEP (*(.fini))
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(0x10);
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} >rom
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} >rom
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__exidx_end = .;
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_etext = .;
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.data : ALIGN(0x10)
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{
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__data_load = LOADADDR(.data);
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_sidata = LOADADDR (.data);
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__data_start = .;
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_sdata = .;
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KEEP(*(.jcr))
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*(.got.plt) *(.got)
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*(.shdata)
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*(.data .data.* .gnu.linkonce.d.*)
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. = ALIGN(0x10);
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_edata = .;
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} >ram AT>rom
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.bss : ALIGN(0x10)
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{
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__bss_start__ = . ;
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_sbss = .;
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*(.shbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(0x10);
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__bss_end__ = .;
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_end = .;
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__end = _end;
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_ebss = .;
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PROVIDE(end = .);
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} >ram AT>rom
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.heap : ALIGN(0x10)
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{
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__heap_start__ = .;
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. += MIN_SIZE_HEAP; /* will generate error if this minimum size not available */
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. += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
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_eheap = .;
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} >ram
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.stack : ALIGN(0x10)
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{
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__stack_start__ = .;
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. += MAIN_STACK_SIZE;
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_estack = .;
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} >ram
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.stab 0 (NOLOAD) :
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{
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*(.stab)
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}
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.stabstr 0 (NOLOAD) :
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{
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*(.stabstr)
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}
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
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.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
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/DISCARD/ : { *(.note.GNU-stack) }
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}
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