2018-02-08 15:27:53 +08:00
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;/*
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2021-04-09 10:52:34 +08:00
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; * Copyright (c) 2006-2021, RT-Thread Development Team
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2018-02-08 15:27:53 +08:00
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; *
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2021-04-09 10:52:34 +08:00
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; * SPDX-License-Identifier: Apache-2.0
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2018-02-08 15:27:53 +08:00
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; *
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; * Change Logs:
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; * Date Author Notes
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; * 2011-08-14 weety copy from mini2440
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; */
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#define NOINT 0xC0
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;/*
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; * rt_base_t rt_hw_interrupt_disable();
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; */
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.globl rt_hw_interrupt_disable
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rt_hw_interrupt_disable:
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MRS R0, CPSR
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ORR R1, R0, #NOINT
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MSR CPSR_c, R1
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BX LR
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/*
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* void rt_hw_interrupt_enable(rt_base_t level);
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*/
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.globl rt_hw_interrupt_enable
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rt_hw_interrupt_enable:
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MSR CPSR, R0
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BX LR
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/*
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* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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* r0 --> from
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* r1 --> to
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*/
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.globl rt_hw_context_switch
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rt_hw_context_switch:
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STMFD SP!, {LR} @; push pc (lr should be pushed in place of pc)
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STMFD SP!, {R0-R12, LR} @; push lr & register file
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MRS R4, CPSR
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STMFD SP!, {R4} @; push cpsr
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STR SP, [R0] @; store sp in preempted tasks tcb
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LDR SP, [R1] @; get new task stack pointer
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LDMFD SP!, {R4} @; pop new task spsr
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MSR SPSR_cxsf, R4
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LDMFD SP!, {R0-R12, LR, PC}^ @; pop new task r0-r12, lr & pc
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/*
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* void rt_hw_context_switch_to(rt_uint32 to);
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* r0 --> to
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*/
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.globl rt_hw_context_switch_to
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rt_hw_context_switch_to:
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LDR SP, [R0] @; get new task stack pointer
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LDMFD SP!, {R4} @; pop new task cpsr
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MSR SPSR_cxsf, R4
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LDMFD SP!, {R0-R12, LR, PC}^ @; pop new task r0-r12, lr & pc
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/*
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* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
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*/
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch_interrupt
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rt_hw_context_switch_interrupt:
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LDR R2, =rt_thread_switch_interrupt_flag
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LDR R3, [R2]
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CMP R3, #1
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BEQ _reswitch
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MOV R3, #1 @; set flag to 1
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STR R3, [R2]
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LDR R2, =rt_interrupt_from_thread @; set rt_interrupt_from_thread
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STR R0, [R2]
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_reswitch:
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LDR R2, =rt_interrupt_to_thread @; set rt_interrupt_to_thread
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STR R1, [R2]
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BX LR
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