349 lines
9.8 KiB
C
349 lines
9.8 KiB
C
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Email: opensource_embedded@phytium.com.cn
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*
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* Change Logs:
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* Date Author Notes
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* 2023-03-20 zhangyan first version
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*
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*/
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#include "drv_qspi.h"
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#include "sdkconfig.h"
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#ifdef RT_USING_QSPI
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#include <rtthread.h>
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#include "rtdevice.h"
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#include "fqspi_flash.h"
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#include "fdebug.h"
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#include "fpinctrl.h"
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#define FQSPI_DEBUG_TAG "FQSPI"
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#define FQSPI_ERROR(format, ...) FT_DEBUG_PRINT_E(FQSPI_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FQSPI_WARN(format, ...) FT_DEBUG_PRINT_W(FQSPI_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FQSPI_INFO(format, ...) FT_DEBUG_PRINT_I(FQSPI_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FQSPI_DEBUG(format, ...) FT_DEBUG_PRINT_D(FQSPI_DEBUG_TAG, format, ##__VA_ARGS__)
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#define DAT_LENGTH 128
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struct phytium_qspi_bus
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{
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char *name;
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rt_uint32_t init; /* 0 is init already */
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FQspiCtrl fqspi;
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struct rt_spi_bus qspi_bus;
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};
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static struct phytium_qspi_bus phytium_qspi; /* phytium qspi bus handle */
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static struct rt_qspi_device *qspi_device; /* phytium device bus handle */
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static char qspi_bus_name[RT_NAME_MAX] = "QSPIBUS";
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static char qspi_dev_name[RT_NAME_MAX] = "QSPIDEV";
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rt_err_t FQspiInit(FQspiCtrl *fqspi)
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{
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u32 qspi_id = FQSPI0_ID;
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FError ret = FT_SUCCESS;
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#if defined(CONFIG_TARGET_E2000)
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FIOPadSetQspiMux(qspi_id, FQSPI_CS_0);
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FIOPadSetQspiMux(qspi_id, FQSPI_CS_1);
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#endif
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FQspiDeInitialize(fqspi);
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FQspiConfig pconfig = *FQspiLookupConfig(qspi_id);
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/* Norflash init, include reset and read flash_size */
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ret = FQspiCfgInitialize(fqspi, &pconfig);
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Qspi init failed.\n");
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return RT_ERROR;
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}
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else
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{
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FQSPI_DEBUG("Qspi init successfully.\n");
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}
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/* Detect connected flash infomation */
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ret = FQspiFlashDetect(fqspi);
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Qspi flash detect failed.\n");
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return RT_ERROR;
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}
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else
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{
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FQSPI_DEBUG("Qspi flash detect successfully.\n");
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}
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return RT_EOK;
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}
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static rt_err_t phytium_qspi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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struct phytium_qspi_bus *qspi_bus;
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qspi_bus = (struct phytium_qspi_bus *) device->bus->parent.user_data;
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rt_err_t ret = RT_EOK;
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ret = FQspiInit(&(qspi_bus->fqspi));
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if (RT_EOK != ret)
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{
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qspi_bus->init = RT_FALSE;
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FQSPI_DEBUG("Qspi init failed!!!\n");
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return RT_ERROR;
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}
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qspi_bus->init = RT_EOK;
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return RT_EOK;
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}
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static rt_uint32_t phytium_qspi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(message != RT_NULL);
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struct phytium_qspi_bus *qspi_bus;
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struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
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rt_uint32_t cmd = qspi_message->instruction.content;
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rt_uint32_t flash_addr = qspi_message->address.content;
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rt_uint8_t *rcvb = message->recv_buf;
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rt_uint8_t *sndb = message->send_buf;
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FError ret = FT_SUCCESS;
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qspi_bus = (struct phytium_qspi_bus *) device->bus->parent.user_data;
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/*Distinguish the write mode according to different commands*/
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if (cmd == FQSPI_FLASH_CMD_PP||cmd == FQSPI_FLASH_CMD_QPP||cmd ==FQSPI_FLASH_CMD_4PP||cmd ==FQSPI_FLASH_CMD_4QPP )
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{
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char *strs = (char *)message->send_buf;
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rt_uint8_t len = strlen(strs) + 1;
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rt_uint8_t *wr_buf = NULL;
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wr_buf = (rt_uint8_t *)rt_malloc(DAT_LENGTH * sizeof(rt_uint8_t));
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rt_memcpy(wr_buf, strs, len);
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message->length = len;
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ret = FQspiFlashErase(&(qspi_bus->fqspi), FQSPI_FLASH_CMD_SE, flash_addr);
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Failed to erase mem, test result 0x%x.\r\n", ret);
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return RT_ERROR;
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}
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/* write norflash data */
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ret = FQspiFlashWriteData(&(qspi_bus->fqspi), cmd, flash_addr, wr_buf, len);
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Failed to write mem, test result 0x%x.\r\n", ret);
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return RT_ERROR;
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}
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else
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{
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rt_kprintf("Write successfully!!!\r\n");
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}
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rt_free(wr_buf);
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return RT_EOK;
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}
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/*Distinguish the read mode according to different commands*/
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if (cmd == FQSPI_FLASH_CMD_READ||cmd == FQSPI_FLASH_CMD_4READ||cmd == FQSPI_FLASH_CMD_FAST_READ||cmd == FQSPI_FLASH_CMD_4FAST_READ||
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cmd == FQSPI_FLASH_CMD_DUAL_READ||cmd == FQSPI_FLASH_CMD_QIOR||cmd == FQSPI_FLASH_CMD_4QIOR)
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{
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rt_uint8_t *rd_buf = NULL;
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rd_buf = (rt_uint8_t *)rt_malloc(DAT_LENGTH * sizeof(rt_uint8_t));
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ret |= FQspiFlashReadDataConfig(&(qspi_bus->fqspi), cmd);
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Failed to config read, test result 0x%x.\r\n", ret);
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return RT_ERROR;
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}
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/* read norflash data */
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size_t read_len = FQspiFlashReadData(&(qspi_bus->fqspi), flash_addr, rd_buf, DAT_LENGTH);
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message->length = read_len;
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if (read_len != DAT_LENGTH)
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{
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FQSPI_DEBUG("Failed to read mem, read len = %d.\r\n", read_len);
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return RT_ERROR;
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}
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else
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{
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rt_kprintf("Read successfully!!!\r\n");
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message->recv_buf = rd_buf;
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rt_free(rd_buf);
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}
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FtDumpHexByte(message->recv_buf, DAT_LENGTH);
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return RT_EOK;
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}
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if (rcvb)
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{
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if (cmd == FQSPI_FLASH_CMD_RDID||cmd == FQSPI_FLASH_CMD_RDSR1||cmd == FQSPI_FLASH_CMD_RDSR2 ||cmd == FQSPI_FLASH_CMD_RDSR3)
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{
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ret |= FQspiFlashSpecialInstruction(&(qspi_bus->fqspi), cmd, rcvb, sizeof(rcvb));
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Failed to read flash information.\n");
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return RT_ERROR;
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}
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}
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return RT_EOK;
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}
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if (sndb)
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{
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ret |= FQspiFlashEnableWrite(&(qspi_bus->fqspi));
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Failed to enable flash reg write.\n");
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return RT_ERROR;
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}
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ret |= FQspiFlashWriteReg(&(qspi_bus->fqspi), cmd, sndb, 1);
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if (FT_SUCCESS != ret)
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{
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FQSPI_DEBUG("Failed to write flash reg.\n");
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return RT_ERROR;
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}
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return RT_EOK;
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}
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}
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static struct rt_spi_ops phytium_qspi_ops =
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{
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.configure = phytium_qspi_configure,
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.xfer = phytium_qspi_xfer,
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};
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rt_err_t phytium_qspi_bus_attach_device(const char *bus_name, const char *device_name)
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{
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struct rt_qspi_device *qspi_device;
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rt_err_t result = RT_EOK;
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
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if (qspi_device == RT_NULL)
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{
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FQSPI_DEBUG("Qspi bus attach device failed.");
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result = RT_ENOMEM;
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goto __exit;
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}
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result = rt_spi_bus_attach_device(&(qspi_device->parent), device_name, bus_name, RT_NULL);
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__exit:
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if (result != RT_EOK)
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{
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if (qspi_device)
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{
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rt_free(qspi_device);
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}
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return result;
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}
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}
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int rt_hw_qspi_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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phytium_qspi.qspi_bus.parent.user_data = &phytium_qspi;
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if(rt_qspi_bus_register(&phytium_qspi.qspi_bus, qspi_bus_name , &phytium_qspi_ops) == RT_EOK)
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{
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rt_kprintf("Qspi bus register successfully!!!\n");
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}
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else
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{
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FQSPI_DEBUG("Qspi bus register Failed!!!\n");
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result = -RT_ERROR;
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_qspi_init);
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/*example*/
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struct rt_spi_message write_message;
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struct rt_spi_message read_message;
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rt_err_t qspi_init()
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{
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rt_err_t res = RT_EOK;
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res = phytium_qspi_bus_attach_device(qspi_bus_name, qspi_dev_name);
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RT_ASSERT(res == RT_EOK);
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qspi_device = (struct rt_qspi_device *)rt_device_find(qspi_dev_name);
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return res;
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}
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/*read cmd example message improvement*/
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void ReadCmd(struct rt_spi_message *spi_message)
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{
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struct rt_qspi_message *message = (struct rt_qspi_message*) spi_message;
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message->address.content = 0x360000 ;/*Flash address*/
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message->instruction.content = 0x03 ;/*read cmd*/
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rt_qspi_transfer_message(qspi_device, message);
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}
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/*write cmd example message improvement*/
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void WriteCmd(struct rt_spi_message *spi_message)
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{
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struct rt_qspi_message *message = (struct rt_qspi_message*) spi_message;
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message->address.content = 0x360000 ;/*Flash address*/
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message->instruction.content = 0x02 ;/*write cmd*/
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rt_qspi_transfer_message(qspi_device, message);
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}
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/*write cmd example message improvement*/
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void qspi_thread(void *parameter)
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{
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rt_err_t res;
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qspi_init();
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/*Read and write flash chip fixed area repeatedly*/
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write_message.send_buf = "111111111111111111111111";
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WriteCmd(&write_message);
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ReadCmd(&read_message);
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write_message.send_buf = "222222222222222222222222";
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WriteCmd(&write_message);
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ReadCmd(&read_message);
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write_message.send_buf = "333333333333333333333333";
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WriteCmd(&write_message);
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ReadCmd(&read_message);
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rt_uint8_t recv;
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rt_uint8_t cmd = 0x9F;/*read the flash status reg2*/
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res = rt_qspi_send_then_recv(qspi_device, &cmd, sizeof(cmd), &recv, sizeof(recv));
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RT_ASSERT(res!=RT_EOK);
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rt_kprintf("The status reg = %x \n" ,recv);
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return 0;
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}
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rt_err_t qspi_sample(int argc, char *argv[])
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{
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rt_thread_t thread;
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rt_err_t res;
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thread = rt_thread_create("qspi_thread", qspi_thread, RT_NULL, 1024, 25, 10);
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res = rt_thread_startup(thread);
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RT_ASSERT(res==RT_EOK);
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return res;
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}
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/* Enter qspi_sample command for testing */
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MSH_CMD_EXPORT(qspi_sample, qspi sample);
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#endif
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