475 lines
16 KiB
C
475 lines
16 KiB
C
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/*
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* Copyright 2020-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_SSARC_H_
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#define _FSL_SSARC_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup ssarc
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief SSARC driver version 2.1.0. */
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#define FSL_SSARC_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
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/*@}*/
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#define SSARC_INT_STATUS_ALL \
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(SSARC_LP_INT_STATUS_ADDR_ERR_MASK | SSARC_LP_INT_STATUS_AHB_ERR_MASK | SSARC_LP_INT_STATUS_SW_REQ_DONE_MASK | \
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SSARC_LP_INT_STATUS_TIMEOUT_MASK | SSARC_LP_INT_STATUS_GROUP_CONFLICT_MASK)
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/*!
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* @brief The enumeration of ssarc status flags.
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*/
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enum _ssarc_interrupt_status_flags
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{
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kSSARC_AddressErrorFlag = SSARC_LP_INT_STATUS_ADDR_ERR_MASK, /*!< If the descriptor is not in the range,
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assert address error. */
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kSSARC_AHBErrorFlag = SSARC_LP_INT_STATUS_AHB_ERR_MASK, /*!< If any AHB master access receives none-OKAY,
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assert AHB error. */
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kSSARC_SoftwareRequestDoneFlag = SSARC_LP_INT_STATUS_SW_REQ_DONE_MASK, /*!< If a software triggered save or restore
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process is completed, assert sofware
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request done . */
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kSSARC_TimeoutFlag = SSARC_LP_INT_STATUS_TIMEOUT_MASK, /*!< If processing of a group has exceeded the
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timeout value, assert timeout. */
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kSSARC_GroupConflictFlag = SSARC_LP_INT_STATUS_GROUP_CONFLICT_MASK, /*!< Group conflict. */
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};
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/*!
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* @brief The size of the register to be saved/restored.
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*/
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typedef enum _ssarc_descriptor_register_size
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{
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kSSARC_DescriptorRegister8bitWidth = 0x0U, /*!< The register to be saved/restored is 8 bit width. */
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kSSARC_DescriptorRegister16bitWidth = 0x1U, /*!< The register to be saved/restored is 16 bit width. */
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kSSARC_DescriptorRegister32bitWidth = 0x2U, /*!< The register to be saved/restored is 32 bit width. */
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} ssarc_descriptor_register_size_t;
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/*!
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* @brief The operation of the descriptor.
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*/
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typedef enum _ssarc_descriptor_operation
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{
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kSSARC_SaveDisableRestoreDisable = 0x0U, /*!< Disable Save operation, disable restore operation. */
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kSSARC_SaveEnableRestoreDisable = SSARC_HP_SRAM2_SV_EN_MASK, /*!< Enable Save operation,
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disable restore operation. */
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kSSARC_SaveDisableRestoreEnable = SSARC_HP_SRAM2_RT_EN_MASK, /*!< Disable Save operation,
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enable restore operation. */
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kSSARC_SaveEnableRestoreEnable = (SSARC_HP_SRAM2_RT_EN_MASK | SSARC_HP_SRAM2_SV_EN_MASK),
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/*!< Enable Save operation, enable restore operation. */
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} ssarc_descriptor_operation_t;
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/*!
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* @brief The type of operation.
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*/
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typedef enum _ssarc_descriptor_type
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{
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kSSARC_ReadValueWriteBack = 0x00U, /*!< Read the register value on save operation
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and write it back on restore operation */
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kSSARC_WriteFixedValue = 0x01U, /*!< Always write a fixed value from DATA[31:0] */
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kSSARC_RMWOr = 0x02U, /*!< Read register, OR with the DATA[31:0], and write it back */
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kSSARC_RMWAnd = 0x03U, /*!< Read register, AND with the DATA[31:0], and write it back */
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kSSARC_DelayCycles = 0x04U, /*!< Delay for number of cycles based on the DATA[31:0] */
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kSSARC_Polling0 = 0x05U, /*!< Read the register until read_data[31:0] & DATA[31:0] == 0 */
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kSSARC_Polling1 = 0x06U, /*!< Read the register until read_data[31:0] & DATA[31:0] != 0 */
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} ssarc_descriptor_type_t;
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/*!
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* @brief The order of the restore/save operation.
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*/
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typedef enum _ssarc_save_restore_order
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{
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kSSARC_ProcessFromStartToEnd = 0U, /*!< Descriptors within the group are processed from start to end. */
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kSSARC_ProcessFromEndToStart = 1U, /*!< Descriptors within the group are processed from end to start. */
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} ssarc_save_restore_order_t;
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/*!
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* @brief Software trigger mode.
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*/
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typedef enum _ssarc_software_trigger_mode
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{
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kSSARC_TriggerSaveRequest = SSARC_LP_DESC_CTRL1_SW_TRIG_SV_MASK, /*!< Don't trigger restore operation, trigger the
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save operation by software. */
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kSSARC_TriggerRestoreRequest = SSARC_LP_DESC_CTRL1_SW_TRIG_RT_MASK, /*!< Trigger the restore operation, don't
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trigger the save operation. */
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} ssarc_software_trigger_mode_t;
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/*!
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* @brief The configuration of descriptor.
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*/
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typedef struct _ssarc_descriptor_config
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{
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uint32_t address; /*!< The address of the register/memory to be saved/restored. */
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uint32_t data; /*!< The value of the register/memory to be saved/restored, please note that if the type
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is selected as kSSARC_ReadValueWriteBack, this data field is useless. */
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ssarc_descriptor_register_size_t size; /*!< The size of register to be saved/restored. */
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ssarc_descriptor_operation_t operation; /*!< The operation mode of descriptor. */
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ssarc_descriptor_type_t type; /*!< The type of operation. */
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} ssarc_descriptor_config_t;
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/*!
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* @brief The configuration of the group.
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*/
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typedef struct _ssarc_group_config
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{
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ssarc_cpu_domain_name_t cpuDomain; /*!< CPU domain, define the ownership of this group. */
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uint32_t startIndex; /*!< The index of the first descriptor of the group. */
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uint32_t endIndex; /*!< The index of the last descriptor of the group. */
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ssarc_save_restore_order_t restoreOrder; /*!< The restore order. */
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ssarc_save_restore_order_t saveOrder; /*!< The save order. */
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uint8_t restorePriority; /*!< Restore priority of current group.
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0 is the highest priority, 15 is the lowest priority */
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uint8_t savePriority; /*!< Save priority of current group.
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0 is the highest priority, 15 is the lowest priority. */
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ssarc_power_domain_name_t powerDomain; /*!< Power domain. */
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uint32_t highestAddress; /*!< Highest address that can be accessed for the descriptors in the group. */
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uint32_t lowestAddress; /*!< Lowest address that can be accessed for the descriptors in the group. */
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} ssarc_group_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Descriptor related APIs.
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* @{
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*/
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/*!
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* @brief Gets the address of the register to be saved/restored.
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*
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* @param base SSARC_HP peripheral base address.
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* @param index The index of descriptor. Range from 0 to 1023.
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* @return The address of the register.
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*/
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static inline uint32_t SSARC_GetDescriptorRegisterAddress(SSARC_HP_Type *base, uint32_t index)
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{
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assert(index < SSARC_HP_SRAM0_COUNT);
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return (base->DESC[index].SRAM0);
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}
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/*!
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* @brief Gets the value of the register to be saved/restored.
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*
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* @param base SSARC_HP peripheral base address.
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* @param index The index of descriptor. Range from 0 to 1023.
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* @return The value of the register.
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*/
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static inline uint32_t SSARC_GetDescriptorRegisterData(SSARC_HP_Type *base, uint32_t index)
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{
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assert(index < SSARC_HP_SRAM0_COUNT);
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return (base->DESC[index].SRAM1);
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}
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/*!
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* @brief Sets the configuration of the descriptor.
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*
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* @param base SSARC_HP peripheral base address.
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* @param index The index of descriptor. Range from 0 to 1023.
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* @param config Pointer to the structure ssarc_descriptor_config_t. Please refer to @ref ssarc_descriptor_config_t for
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* details.
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*/
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void SSARC_SetDescriptorConfig(SSARC_HP_Type *base, uint32_t index, const ssarc_descriptor_config_t *config);
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/*!
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* @}
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*/
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/*!
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* @name Group Related APIs
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* @{
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*/
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/*!
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* @brief Inits the selected group.
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*
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* @note For the groups with the same save priority or restore priority,
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* the save/restore operation runs in the group order.
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*
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* @param base SSARC_LP peripheral base address.
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* @param groupID The index of the group. Range from 0 to 15.
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* @param config Pointer to the structure ssarc_group_config_t. Please refer to @ref ssarc_group_config_t for details.
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*/
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void SSARC_GroupInit(SSARC_LP_Type *base, uint8_t groupID, const ssarc_group_config_t *config);
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/*!
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* @brief De-inits the selected group.
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*
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* @param base SSARC_LP peripheral base address.
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* @param groupID The index of the group. Range from 0 to 15.
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*/
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static inline void SSARC_GroupDeinit(SSARC_LP_Type *base, uint8_t groupID)
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{
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assert(groupID < SSARC_LP_DESC_CTRL0_COUNT);
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base->GROUPS[groupID].DESC_CTRL1 &= ~SSARC_LP_DESC_CTRL1_GP_EN_MASK;
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}
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/*!
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* @brief Locks the configuration of the domain.
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*
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* This function locks the configuration of the domain. Once locked, only the access from the same domain is allowed,
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* access from other domains will be blocked. Once locked, it can only be unlocked by a hardware reset.
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*
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* @param base SSARC_LP peripheral base address.
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* @param groupID The index of the group. Range from 0 to 15.
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*/
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static inline void SSARC_LockGroupDomain(SSARC_LP_Type *base, uint8_t groupID)
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{
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assert(groupID < SSARC_LP_DESC_CTRL0_COUNT);
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base->GROUPS[groupID].DESC_CTRL1 |= SSARC_LP_DESC_CTRL1_DL_MASK;
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}
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/*!
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* @brief Locks the write access to the control registers and descriptors for the selected group.
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*
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* This function Locks the write access to the control registers and descriptors for the selected group.
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* All writes are blocked. Once locked, it can only be unlocked by a hardware reset.
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*
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* @param base SSARC_LP peripheral base address.
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* @param groupID The index of the group. Range from 0 to 15.
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*/
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static inline void SSARC_LockGroupWrite(SSARC_LP_Type *base, uint8_t groupID)
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{
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assert(groupID < SSARC_LP_DESC_CTRL0_COUNT);
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base->GROUPS[groupID].DESC_CTRL1 |= SSARC_LP_DESC_CTRL1_WL_MASK;
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}
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/*!
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* @brief Locks the read access to the control registers and descriptors for the selected group.
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*
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* This function Locks the read access to the control registers and descriptors for the selected group.
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* All reads are blocked. Once locked, it can only be unlocked by a hardware reset.
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*
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* @param base SSARC_LP peripheral base address.
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* @param groupID The index of the group. Range from 0 to 15.
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*/
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static inline void SSARC_LockGroupRead(SSARC_LP_Type *base, uint8_t groupID)
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{
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assert(groupID < SSARC_LP_DESC_CTRL0_COUNT);
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base->GROUPS[groupID].DESC_CTRL1 |= SSARC_LP_DESC_CTRL1_RL_MASK;
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}
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/*!
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* @brief Triggers software request.
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*
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* @note Each group allows software to trigger the save/restore operation without getting the request
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* from basic power controller.
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*
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* @param base SSARC_LP peripheral base address.
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* @param groupID The index of the group. Range from 0 to 15.
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* @param mode Software trigger mode. Please refer to @ref ssarc_software_trigger_mode_t for details.
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*/
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void SSARC_TriggerSoftwareRequest(SSARC_LP_Type *base, uint8_t groupID, ssarc_software_trigger_mode_t mode);
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/*!
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* @}
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*/
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/*!
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* @name Global Setting Related APIs
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*/
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/*!
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* @brief Resets the whole SSARC block by software.
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*
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* @note Only reset the SSARC registers, not include the DESC in SRAM.
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*
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* @param base SSARC_LP peripheral base address.
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*/
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static inline void SSARC_ResetWholeBlock(SSARC_LP_Type *base)
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{
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base->CTRL |= SSARC_LP_CTRL_SW_RESET_MASK;
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base->CTRL &= ~SSARC_LP_CTRL_SW_RESET_MASK;
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}
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/*!
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* @brief Enables/Disables save/restore request from the PGMC module.
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*
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* @param base SSARC_LP peripheral base address.
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* @param enable Used to enable/disable save/restore hardware request.
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* - \b true Enable GPC save/restore requests.
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* - \b false Disable GPC save/restore requests.
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*/
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static inline void SSARC_EnableHardwareRequest(SSARC_LP_Type *base, bool enable)
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{
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if (enable)
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{
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base->CTRL &= ~SSARC_LP_CTRL_DIS_HW_REQ_MASK;
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}
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else
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{
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base->CTRL |= SSARC_LP_CTRL_DIS_HW_REQ_MASK;
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}
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}
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/*!
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* @}
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*/
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/*!
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* @name Status Related APIs
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* @{
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*/
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/*!
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* @brief Gets status flags.
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*
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* @param base SSARC_LP peripheral base address.
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* @return The value of status flags. See @ref _ssarc_interrupt_status_flags for details.
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*/
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static inline uint32_t SSARC_GetStatusFlags(SSARC_LP_Type *base)
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{
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return ((base->INT_STATUS) & SSARC_INT_STATUS_ALL);
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}
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/*!
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* @brief Clears status flags.
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*
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* @note Only @ref kSSARC_AddressErrorFlag, @ref kSSARC_AHBErrorFlag, @ref kSSARC_TimeoutFlag and
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* @ref kSSARC_GroupConflictFlag can be cleared.
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*
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* @param base SSARC_LP peripheral base address.
|
||
|
|
* @param mask The mask value for flags to be cleared. See @ref _ssarc_interrupt_status_flags for details.
|
||
|
|
*/
|
||
|
|
|
||
|
|
static inline void SSARC_ClearStatusFlags(SSARC_LP_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
base->INT_STATUS = mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the error index that indicates which descriptor will trigger the AHB_ERR or ADDR_ERR interrupt.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @return The error index.
|
||
|
|
*/
|
||
|
|
static inline uint32_t SSARC_GetErrorIndex(SSARC_LP_Type *base)
|
||
|
|
{
|
||
|
|
return (base->INT_STATUS & SSARC_LP_INT_STATUS_ERR_INDEX_MASK);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
*@}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name Time Out Related APIs
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Sets timeout value for the entire group to complete.
|
||
|
|
*
|
||
|
|
* This function sets timeout value for the entire group to complete. Setting timeout value
|
||
|
|
* to 0 will disable this feature.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @param value The timeout value, 0 means disable time out feature.
|
||
|
|
*/
|
||
|
|
static inline void SSARC_SetTimeoutValue(SSARC_LP_Type *base, uint32_t value)
|
||
|
|
{
|
||
|
|
base->HP_TIMEOUT = value;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets timeout value for AHB clock.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @return The timeout value.
|
||
|
|
*/
|
||
|
|
static inline uint32_t SSARC_GetTimeoutValue(SSARC_LP_Type *base)
|
||
|
|
{
|
||
|
|
return base->HP_TIMEOUT;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name Pending Group Related APIs
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the value that indicates which groups are pending for restore from hardware request.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @return The value of the pending groups.
|
||
|
|
*/
|
||
|
|
static inline uint16_t SSARC_GetHardwareRequestRestorePendingGroup(SSARC_LP_Type *base)
|
||
|
|
{
|
||
|
|
return (uint16_t)(((base->HW_GROUP_PENDING) & SSARC_LP_HW_GROUP_PENDING_HW_RESTORE_PENDING_MASK) >>
|
||
|
|
SSARC_LP_HW_GROUP_PENDING_HW_RESTORE_PENDING_SHIFT);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the value that indicates which groups are pending for save from hardware request.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @return The value of the pending groups.
|
||
|
|
*/
|
||
|
|
static inline uint16_t SSARC_GetHardwareRequestSavePendingGroup(SSARC_LP_Type *base)
|
||
|
|
{
|
||
|
|
return (uint16_t)(((base->HW_GROUP_PENDING) & SSARC_LP_HW_GROUP_PENDING_HW_SAVE_PENDING_MASK) >>
|
||
|
|
SSARC_LP_HW_GROUP_PENDING_HW_SAVE_PENDING_SHIFT);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the value that indicates which groups are pending for restore from software request.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @return The value of the pending groups.
|
||
|
|
*/
|
||
|
|
static inline uint16_t SSARC_GetSoftwareRequestRestorePendingGroup(SSARC_LP_Type *base)
|
||
|
|
{
|
||
|
|
return (uint16_t)(((base->SW_GROUP_PENDING) & SSARC_LP_SW_GROUP_PENDING_SW_RESTORE_PENDING_MASK) >>
|
||
|
|
SSARC_LP_SW_GROUP_PENDING_SW_RESTORE_PENDING_SHIFT);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the value that indicates which groups are pending for save from software request.
|
||
|
|
*
|
||
|
|
* @param base SSARC_LP peripheral base address.
|
||
|
|
* @return The value of the pending groups.
|
||
|
|
*/
|
||
|
|
static inline uint16_t SSARC_GetSoftwareRequestSavePendingGroup(SSARC_LP_Type *base)
|
||
|
|
{
|
||
|
|
return (uint16_t)(((base->SW_GROUP_PENDING) & SSARC_LP_SW_GROUP_PENDING_SW_SAVE_PENDING_MASK) >>
|
||
|
|
SSARC_LP_SW_GROUP_PENDING_SW_SAVE_PENDING_SHIFT);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#if defined(__cplusplus)
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* _FSL_SSARC_H_ */
|