663 lines
20 KiB
C
663 lines
20 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_acmp.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.acmp"
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#endif
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get the ACMP instance from the peripheral base address.
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*
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* @param base ACMP peripheral base address.
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* @return ACMP instance.
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*/
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static uint32_t ACMP_GetInstance(CMP_Type *base);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* Array of ACMP peripheral base address. */
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static CMP_Type *const s_acmpBases[] = CMP_BASE_PTRS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Clock name of ACMP. */
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static const clock_ip_name_t s_acmpClock[] = CMP_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*******************************************************************************
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* Codes
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******************************************************************************/
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static uint32_t ACMP_GetInstance(CMP_Type *base)
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{
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uint32_t instance = 0U;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_acmpBases); instance++)
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{
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if (s_acmpBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_acmpBases));
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return instance;
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}
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/*!
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* brief Initializes the ACMP.
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*
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* The default configuration can be got by calling ACMP_GetDefaultConfig().
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*
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* param base ACMP peripheral base address.
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* param config Pointer to ACMP configuration structure.
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*/
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void ACMP_Init(CMP_Type *base, const acmp_config_t *config)
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{
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assert(NULL != config);
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uint32_t tmp32;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Open clock gate. */
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CLOCK_EnableClock(s_acmpClock[ACMP_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* Disable the module before configuring it. */
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ACMP_Enable(base, false);
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/* CMPx_C0
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* Set control bit. Avoid clearing status flags at the same time.
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*/
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tmp32 = (base->C0 & (~(CMP_C0_PMODE_MASK | CMP_C0_INVT_MASK | CMP_C0_COS_MASK | CMP_C0_OPE_MASK |
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CMP_C0_HYSTCTR_MASK | CMP_C0_CFx_MASK)));
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#if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
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tmp32 &= ~CMP_C0_OFFSET_MASK;
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#endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
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if (config->enableHighSpeed)
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{
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tmp32 |= CMP_C0_PMODE_MASK;
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}
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if (config->enableInvertOutput)
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{
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tmp32 |= CMP_C0_INVT_MASK;
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}
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if (config->useUnfilteredOutput)
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{
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tmp32 |= CMP_C0_COS_MASK;
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}
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if (config->enablePinOut)
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{
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tmp32 |= CMP_C0_OPE_MASK;
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}
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tmp32 |= CMP_C0_HYSTCTR(config->hysteresisMode);
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#if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
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tmp32 |= CMP_C0_OFFSET(config->offsetMode);
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#endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
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base->C0 = tmp32;
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}
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/*!
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* brief Deinitializes the ACMP.
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*
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* param base ACMP peripheral base address.
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*/
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void ACMP_Deinit(CMP_Type *base)
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{
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/* Disable the module. */
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ACMP_Enable(base, false);
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Disable clock gate. */
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CLOCK_DisableClock(s_acmpClock[ACMP_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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/*!
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* brief Gets the default configuration for ACMP.
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*
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* This function initializes the user configuration structure to default value. The default value are:
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*
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* Example:
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code
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config->enableHighSpeed = false;
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config->enableInvertOutput = false;
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config->useUnfilteredOutput = false;
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config->enablePinOut = false;
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config->enableHysteresisBothDirections = false;
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config->hysteresisMode = kACMP_hysteresisMode0;
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endcode
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*
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* param config Pointer to ACMP configuration structure.
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*/
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void ACMP_GetDefaultConfig(acmp_config_t *config)
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{
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assert(NULL != config);
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/* Initializes the configure structure to zero. */
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(void)memset(config, 0, sizeof(*config));
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/* Fill default configuration */
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config->enableHighSpeed = false;
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config->enableInvertOutput = false;
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config->useUnfilteredOutput = false;
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config->enablePinOut = false;
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#if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
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config->offsetMode = kACMP_OffsetLevel0;
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#endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
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config->hysteresisMode = kACMP_HysteresisLevel0;
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}
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/*!
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* brief Enables or disables the ACMP.
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*
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* param base ACMP peripheral base address.
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* param enable True to enable the ACMP.
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*/
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void ACMP_Enable(CMP_Type *base, bool enable)
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{
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/* CMPx_C0
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* Set control bit. Avoid clearing status flags at the same time.
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*/
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if (enable)
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{
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base->C0 = ((base->C0 | CMP_C0_EN_MASK) & ~CMP_C0_CFx_MASK);
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}
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else
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{
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base->C0 &= ~(CMP_C0_EN_MASK | CMP_C0_CFx_MASK);
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}
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}
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#if defined(FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT) && (FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT == 1U)
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/*!
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* brief Enables the link from CMP to DAC enable.
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*
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* When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].
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*
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* param base ACMP peripheral base address.
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* param enable Enable the feature or not.
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*/
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void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable)
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{
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/* CMPx_C0_LINKEN
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* Set control bit. Avoid clearing status flags at the same time.
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*/
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if (enable)
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{
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base->C0 = ((base->C0 | CMP_C0_LINKEN_MASK) & ~CMP_C0_CFx_MASK);
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}
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else
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{
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base->C0 &= ~(CMP_C0_LINKEN_MASK | CMP_C0_CFx_MASK);
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}
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}
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#endif /* FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT */
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/*!
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* brief Sets the channel configuration.
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*
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* Note that the plus/minus mux's setting is only valid when the positive/negative port's input isn't from DAC but
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* from channel mux.
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*
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* Example:
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code
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acmp_channel_config_t configStruct = {0};
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configStruct.positivePortInput = kACMP_PortInputFromDAC;
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configStruct.negativePortInput = kACMP_PortInputFromMux;
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configStruct.minusMuxInput = 1U;
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ACMP_SetChannelConfig(CMP0, &configStruct);
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endcode
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*
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* param base ACMP peripheral base address.
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* param config Pointer to channel configuration structure.
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*/
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void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config)
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{
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assert(NULL != config);
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uint32_t tmp32 = (base->C1 & (~(CMP_C1_PSEL_MASK | CMP_C1_MSEL_MASK)));
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/* CMPx_C1
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* Set the input of CMP's positive port.
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*/
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#if (defined(FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT == 1U))
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tmp32 &= ~CMP_C1_INPSEL_MASK;
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tmp32 |= CMP_C1_INPSEL(config->positivePortInput);
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#endif /* FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT */
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#if (defined(FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT == 1U))
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tmp32 &= ~CMP_C1_INNSEL_MASK;
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tmp32 |= CMP_C1_INNSEL(config->negativePortInput);
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#endif /* FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT */
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tmp32 |= CMP_C1_PSEL(config->plusMuxInput) | CMP_C1_MSEL(config->minusMuxInput);
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base->C1 = tmp32;
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}
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/*!
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* brief Enables or disables DMA.
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*
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* param base ACMP peripheral base address.
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* param enable True to enable DMA.
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*/
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void ACMP_EnableDMA(CMP_Type *base, bool enable)
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{
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/* CMPx_C0
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* Set control bit. Avoid clearing status flags at the same time.
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*/
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if (enable)
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{
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base->C0 = ((base->C0 | CMP_C0_DMAEN_MASK) & ~CMP_C0_CFx_MASK);
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}
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else
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{
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base->C0 &= ~(CMP_C0_DMAEN_MASK | CMP_C0_CFx_MASK);
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}
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}
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/*!
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* brief Enables or disables window mode.
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*
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* param base ACMP peripheral base address.
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* param enable True to enable window mode.
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*/
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void ACMP_EnableWindowMode(CMP_Type *base, bool enable)
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{
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/* CMPx_C0
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* Set control bit. Avoid clearing status flags at the same time.
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*/
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if (enable)
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{
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base->C0 = ((base->C0 | CMP_C0_WE_MASK) & ~CMP_C0_CFx_MASK);
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}
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else
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{
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base->C0 &= ~(CMP_C0_WE_MASK | CMP_C0_CFx_MASK);
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}
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}
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/*!
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* brief Configures the filter.
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*
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* The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample
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* clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed
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* usage can be got from the reference manual.
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*
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* Example:
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code
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acmp_filter_config_t configStruct = {0};
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configStruct.filterCount = 5U;
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configStruct.filterPeriod = 200U;
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configStruct.enableSample = false;
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ACMP_SetFilterConfig(CMP0, &configStruct);
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endcode
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*
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* param base ACMP peripheral base address.
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* param config Pointer to filter configuration structure.
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*/
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void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config)
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{
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assert(NULL != config);
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/* CMPx_C0
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* Set control bit. Avoid clearing status flags at the same time.
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*/
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uint32_t tmp32 = (base->C0 & (~(CMP_C0_FILTER_CNT_MASK | CMP_C0_FPR_MASK | CMP_C0_SE_MASK | CMP_C0_CFx_MASK)));
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if (config->enableSample)
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{
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tmp32 |= CMP_C0_SE_MASK;
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}
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tmp32 |= (CMP_C0_FILTER_CNT(config->filterCount) | CMP_C0_FPR(config->filterPeriod));
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base->C0 = tmp32;
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}
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/*!
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* brief Configures the internal DAC.
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*
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* Example:
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code
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acmp_dac_config_t configStruct = {0};
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configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
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configStruct.DACValue = 20U;
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configStruct.enableOutput = false;
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configStruct.workMode = kACMP_DACWorkLowSpeedMode;
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ACMP_SetDACConfig(CMP0, &configStruct);
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endcode
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*
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* param base ACMP peripheral base address.
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* param config Pointer to DAC configuration structure. "NULL" is for disabling the feature.
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*/
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void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config)
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{
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uint32_t tmp32;
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/* CMPx_C1
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* NULL configuration means to disable the feature.
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*/
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if (NULL == config)
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{
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base->C1 &= ~CMP_C1_DACEN_MASK;
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return;
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}
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tmp32 = (base->C1 & (~(CMP_C1_VRSEL_MASK | CMP_C1_VOSEL_MASK)));
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/* Set configuration and enable the feature. */
|
||
|
|
tmp32 |= (CMP_C1_VRSEL(config->referenceVoltageSource) | CMP_C1_VOSEL(config->DACValue) | CMP_C1_DACEN_MASK);
|
||
|
|
|
||
|
|
#if defined(FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT == 1U)
|
||
|
|
tmp32 &= ~CMP_C1_DACOE_MASK;
|
||
|
|
if (config->enableOutput)
|
||
|
|
{
|
||
|
|
tmp32 |= CMP_C1_DACOE_MASK;
|
||
|
|
}
|
||
|
|
#endif /* FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT */
|
||
|
|
|
||
|
|
#if defined(FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT == 1U)
|
||
|
|
switch (config->workMode)
|
||
|
|
{
|
||
|
|
case kACMP_DACWorkLowSpeedMode:
|
||
|
|
tmp32 &= ~CMP_C1_DMODE_MASK;
|
||
|
|
break;
|
||
|
|
case kACMP_DACWorkHighSpeedMode:
|
||
|
|
tmp32 |= CMP_C1_DMODE_MASK;
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
assert(false);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
#endif /* FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT */
|
||
|
|
|
||
|
|
base->C1 = tmp32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Configures the round robin mode.
|
||
|
|
*
|
||
|
|
* Example:
|
||
|
|
code
|
||
|
|
acmp_round_robin_config_t configStruct = {0};
|
||
|
|
configStruct.fixedPort = kACMP_FixedPlusPort;
|
||
|
|
configStruct.fixedChannelNumber = 3U;
|
||
|
|
configStruct.checkerChannelMask = 0xF7U;
|
||
|
|
configStruct.sampleClockCount = 0U;
|
||
|
|
configStruct.delayModulus = 0U;
|
||
|
|
ACMP_SetRoundRobinConfig(CMP0, &configStruct);
|
||
|
|
endcode
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param config Pointer to round robin mode configuration structure. "NULL" is for disabling the feature.
|
||
|
|
*/
|
||
|
|
void ACMP_SetRoundRobinConfig(CMP_Type *base, const acmp_round_robin_config_t *config)
|
||
|
|
{
|
||
|
|
uint32_t tmp32;
|
||
|
|
|
||
|
|
/* CMPx_C2
|
||
|
|
* Set control bit. Avoid clearing status flags at the same time.
|
||
|
|
* NULL configuration means to disable the feature.
|
||
|
|
*/
|
||
|
|
if (NULL == config)
|
||
|
|
{
|
||
|
|
tmp32 = CMP_C2_CHnF_MASK;
|
||
|
|
#if defined(FSL_FEATURE_ACMP_HAS_C2_RRE_BIT) && (FSL_FEATURE_ACMP_HAS_C2_RRE_BIT == 1U)
|
||
|
|
tmp32 |= CMP_C2_RRE_MASK;
|
||
|
|
#endif /* FSL_FEATURE_ACMP_HAS_C2_RRE_BIT */
|
||
|
|
base->C2 &= ~(tmp32);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* CMPx_C1
|
||
|
|
* Set all channel's round robin checker enable mask.
|
||
|
|
*/
|
||
|
|
tmp32 = (base->C1 & ~(CMP_C1_CHNn_MASK));
|
||
|
|
tmp32 |= ((config->checkerChannelMask) << CMP_C1_CHN0_SHIFT);
|
||
|
|
base->C1 = tmp32;
|
||
|
|
|
||
|
|
/* CMPx_C2
|
||
|
|
* Set configuration and enable the feature.
|
||
|
|
*/
|
||
|
|
tmp32 = (base->C2 &
|
||
|
|
(~(CMP_C2_FXMP_MASK | CMP_C2_FXMXCH_MASK | CMP_C2_NSAM_MASK | CMP_C2_INITMOD_MASK | CMP_C2_CHnF_MASK)));
|
||
|
|
tmp32 |= (CMP_C2_FXMP(config->fixedPort) | CMP_C2_FXMXCH(config->fixedChannelNumber) |
|
||
|
|
CMP_C2_NSAM(config->sampleClockCount) | CMP_C2_INITMOD(config->delayModulus));
|
||
|
|
#if defined(FSL_FEATURE_ACMP_HAS_C2_RRE_BIT) && (FSL_FEATURE_ACMP_HAS_C2_RRE_BIT == 1U)
|
||
|
|
tmp32 |= CMP_C2_RRE_MASK;
|
||
|
|
#endif /* FSL_FEATURE_ACMP_HAS_C2_RRE_BIT */
|
||
|
|
base->C2 = tmp32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Defines the pre-set state of channels in round robin mode.
|
||
|
|
*
|
||
|
|
* Note: The pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits.
|
||
|
|
* So get-round-robin-result can't return the same value as the value are set by pre-state.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param mask Mask of round robin channel index. Available range is channel0:0x01 to channel7:0x80.
|
||
|
|
*/
|
||
|
|
void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
/* CMPx_C2
|
||
|
|
* Set control bit. Avoid clearing status flags at the same time.
|
||
|
|
*/
|
||
|
|
uint32_t tmp32 = (base->C2 & ~(CMP_C2_ACOn_MASK | CMP_C2_CHnF_MASK));
|
||
|
|
|
||
|
|
tmp32 |= (mask << CMP_C2_ACOn_SHIFT);
|
||
|
|
base->C2 = tmp32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Clears the channel input changed flags in round robin mode.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param mask Mask of channel index. Available range is channel0:0x01 to channel7:0x80.
|
||
|
|
*/
|
||
|
|
void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
/* CMPx_C2 */
|
||
|
|
uint32_t tmp32 = (base->C2 & (~CMP_C2_CHnF_MASK));
|
||
|
|
|
||
|
|
tmp32 |= (mask << CMP_C2_CH0F_SHIFT);
|
||
|
|
base->C2 = tmp32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Enables interrupts.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param mask Interrupts mask. See "_acmp_interrupt_enable".
|
||
|
|
*/
|
||
|
|
void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
uint32_t tmp32;
|
||
|
|
|
||
|
|
/* CMPx_C0
|
||
|
|
* Set control bit. Avoid clearing status flags at the same time.
|
||
|
|
* Set CMP interrupt enable flag.
|
||
|
|
*/
|
||
|
|
tmp32 = base->C0 & ~CMP_C0_CFx_MASK; /* To protect the W1C flags. */
|
||
|
|
if ((uint32_t)kACMP_OutputRisingInterruptEnable == (mask & (uint32_t)kACMP_OutputRisingInterruptEnable))
|
||
|
|
{
|
||
|
|
tmp32 = ((tmp32 | CMP_C0_IER_MASK) & ~CMP_C0_CFx_MASK);
|
||
|
|
}
|
||
|
|
if ((uint32_t)kACMP_OutputFallingInterruptEnable == (mask & (uint32_t)kACMP_OutputFallingInterruptEnable))
|
||
|
|
{
|
||
|
|
tmp32 = ((tmp32 | CMP_C0_IEF_MASK) & ~CMP_C0_CFx_MASK);
|
||
|
|
}
|
||
|
|
base->C0 = tmp32;
|
||
|
|
|
||
|
|
/* CMPx_C2
|
||
|
|
* Set round robin interrupt enable flag.
|
||
|
|
*/
|
||
|
|
if ((uint32_t)kACMP_RoundRobinInterruptEnable == (mask & (uint32_t)kACMP_RoundRobinInterruptEnable))
|
||
|
|
{
|
||
|
|
tmp32 = base->C2;
|
||
|
|
/* Set control bit. Avoid clearing status flags at the same time. */
|
||
|
|
tmp32 = ((tmp32 | CMP_C2_RRIE_MASK) & ~CMP_C2_CHnF_MASK);
|
||
|
|
base->C2 = tmp32;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Disables interrupts.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param mask Interrupts mask. See "_acmp_interrupt_enable".
|
||
|
|
*/
|
||
|
|
void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
uint32_t tmp32;
|
||
|
|
|
||
|
|
/* CMPx_C0
|
||
|
|
* Set control bit. Avoid clearing status flags at the same time.
|
||
|
|
* Clear CMP interrupt enable flag.
|
||
|
|
*/
|
||
|
|
tmp32 = base->C0;
|
||
|
|
if ((uint32_t)kACMP_OutputRisingInterruptEnable == (mask & (uint32_t)kACMP_OutputRisingInterruptEnable))
|
||
|
|
{
|
||
|
|
tmp32 &= ~(CMP_C0_IER_MASK | CMP_C0_CFx_MASK);
|
||
|
|
}
|
||
|
|
if ((uint32_t)kACMP_OutputFallingInterruptEnable == (mask & (uint32_t)kACMP_OutputFallingInterruptEnable))
|
||
|
|
{
|
||
|
|
tmp32 &= ~(CMP_C0_IEF_MASK | CMP_C0_CFx_MASK);
|
||
|
|
}
|
||
|
|
base->C0 = tmp32;
|
||
|
|
|
||
|
|
/* CMPx_C2
|
||
|
|
* Clear round robin interrupt enable flag.
|
||
|
|
*/
|
||
|
|
if ((uint32_t)kACMP_RoundRobinInterruptEnable == (mask & (uint32_t)kACMP_RoundRobinInterruptEnable))
|
||
|
|
{
|
||
|
|
tmp32 = base->C2;
|
||
|
|
/* Set control bit. Avoid clearing status flags at the same time. */
|
||
|
|
tmp32 &= ~(CMP_C2_RRIE_MASK | CMP_C2_CHnF_MASK);
|
||
|
|
base->C2 = tmp32;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Gets status flags.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* return Status flags asserted mask. See "_acmp_status_flags".
|
||
|
|
*/
|
||
|
|
uint32_t ACMP_GetStatusFlags(CMP_Type *base)
|
||
|
|
{
|
||
|
|
uint32_t status = 0U;
|
||
|
|
uint32_t tmp32 = base->C0;
|
||
|
|
|
||
|
|
/* CMPx_C0
|
||
|
|
* Check if each flag is set.
|
||
|
|
*/
|
||
|
|
if (CMP_C0_CFR_MASK == (tmp32 & CMP_C0_CFR_MASK))
|
||
|
|
{
|
||
|
|
status |= (uint32_t)kACMP_OutputRisingEventFlag;
|
||
|
|
}
|
||
|
|
if (CMP_C0_CFF_MASK == (tmp32 & CMP_C0_CFF_MASK))
|
||
|
|
{
|
||
|
|
status |= (uint32_t)kACMP_OutputFallingEventFlag;
|
||
|
|
}
|
||
|
|
if (CMP_C0_COUT_MASK == (tmp32 & CMP_C0_COUT_MASK))
|
||
|
|
{
|
||
|
|
status |= (uint32_t)kACMP_OutputAssertEventFlag;
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Clears status flags.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param mask Status flags mask. See "_acmp_status_flags".
|
||
|
|
*/
|
||
|
|
void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
/* CMPx_C0 */
|
||
|
|
uint32_t tmp32 = (base->C0 & (~(CMP_C0_CFR_MASK | CMP_C0_CFF_MASK)));
|
||
|
|
|
||
|
|
/* Clear flag according to mask. */
|
||
|
|
if ((uint32_t)kACMP_OutputRisingEventFlag == (mask & (uint32_t)kACMP_OutputRisingEventFlag))
|
||
|
|
{
|
||
|
|
tmp32 |= CMP_C0_CFR_MASK;
|
||
|
|
}
|
||
|
|
if ((uint32_t)kACMP_OutputFallingEventFlag == (mask & (uint32_t)kACMP_OutputFallingEventFlag))
|
||
|
|
{
|
||
|
|
tmp32 |= CMP_C0_CFF_MASK;
|
||
|
|
}
|
||
|
|
base->C0 = tmp32;
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(FSL_FEATURE_ACMP_HAS_C3_REG) && (FSL_FEATURE_ACMP_HAS_C3_REG == 1U)
|
||
|
|
/*!
|
||
|
|
* brief Configure the discrete mode.
|
||
|
|
*
|
||
|
|
* Configure the discrete mode when supporting 3V domain with 1.8V core.
|
||
|
|
*
|
||
|
|
* param base ACMP peripheral base address.
|
||
|
|
* param config Pointer to configuration structure. See "acmp_discrete_mode_config_t".
|
||
|
|
*/
|
||
|
|
void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config)
|
||
|
|
{
|
||
|
|
uint32_t tmp32 = 0U;
|
||
|
|
|
||
|
|
if (!config->enablePositiveChannelDiscreteMode)
|
||
|
|
{
|
||
|
|
tmp32 |= CMP_C3_PCHCTEN_MASK;
|
||
|
|
}
|
||
|
|
if (!config->enableNegativeChannelDiscreteMode)
|
||
|
|
{
|
||
|
|
tmp32 |= CMP_C3_NCHCTEN_MASK;
|
||
|
|
}
|
||
|
|
if (config->enableResistorDivider)
|
||
|
|
{
|
||
|
|
tmp32 |= CMP_C3_RDIVE_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
tmp32 |= CMP_C3_DMCS(config->clockSource) /* Select the clock. */
|
||
|
|
| CMP_C3_ACSAT(config->sampleTime) /* Sample time period. */
|
||
|
|
| CMP_C3_ACPH1TC(config->phase1Time) /* Phase 1 sample time. */
|
||
|
|
| CMP_C3_ACPH2TC(config->phase2Time); /* Phase 2 sample time. */
|
||
|
|
|
||
|
|
base->C3 = tmp32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Get the default configuration for discrete mode setting.
|
||
|
|
*
|
||
|
|
* param config Pointer to configuration structure to be restored with the setting values.
|
||
|
|
*/
|
||
|
|
void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config)
|
||
|
|
{
|
||
|
|
assert(NULL != config);
|
||
|
|
|
||
|
|
/* Initializes the configure structure to zero. */
|
||
|
|
(void)memset(config, 0, sizeof(*config));
|
||
|
|
|
||
|
|
config->enablePositiveChannelDiscreteMode = false;
|
||
|
|
config->enableNegativeChannelDiscreteMode = false;
|
||
|
|
config->enableResistorDivider = false;
|
||
|
|
config->clockSource = kACMP_DiscreteClockSlow;
|
||
|
|
config->sampleTime = kACMP_DiscreteSampleTimeAs1T;
|
||
|
|
config->phase1Time = kACMP_DiscretePhaseTimeAlt0;
|
||
|
|
config->phase2Time = kACMP_DiscretePhaseTimeAlt0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* FSL_FEATURE_ACMP_HAS_C3_REG */
|