950 lines
24 KiB
C
950 lines
24 KiB
C
/**
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*
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* \file
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*
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* \brief SAM Segment Liquid Crystal Display(SLCD) Controller.
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*
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* Copyright (c) 2015-2016 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef SLCD_H_INCLUDED
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#define SLCD_H_INCLUDED
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/**
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* \defgroup asfdoc_sam0_drivers_slcd_group SAM Segment Liquid Crystal Display(SLCD) Controller
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*
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* This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration
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* and management of the device's SLCD functionality. The following
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* driver API modes are covered by this manual:
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*
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* - Polled APIs
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* - Callback APIs
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*
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*
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* The following peripheral is used by this module:
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* - Segment Liquid Crystal Display(SLCD)
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*
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* The following devices can use this module:
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* - Atmel | SMART SAM L22
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*
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* The outline of this documentation is as follows:
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* - \ref asfdoc_sam0_drivers_slcd_prerequisites
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* - \ref asfdoc_sam0_drivers_slcd_module_overview
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* - \ref asfdoc_sam0_drivers_slcd_special_considerations
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* - \ref asfdoc_sam0_drivers_slcd_extra_info
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* - \ref asfdoc_sam0_drivers_slcd_examples
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* - \ref asfdoc_sam0_drivers_slcd_api_overview
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*
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*
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* \section asfdoc_sam0_drivers_slcd_prerequisites Prerequisites
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*
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* There are no prerequisites for this module.
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*
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*
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* \section asfdoc_sam0_drivers_slcd_module_overview Module Overview
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*
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* \subsection asfdoc_sam0_drivers_slcd_module_overview_internal Display Overview
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*
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* A LCD display is made of several segments (pixels or complete symbols)
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* which can be visible or invisible. A segment has two electrodes with liquid
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* crystal between them. These electrodes are the common terminal (COM pin) and
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* the segment terminal (SEG pin). When a voltage above a threshold voltage is applied
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* across the liquid crystal, the segment becomes visible. The voltage must alternate,
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* to avoid an electrophoresis effect in the liquid crystal, which degrades the
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* display.
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*
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* The LCD controller is intended for monochrome passive liquid crystal display (LCD)
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* with up to 8 common terminals and up to 44 segment terminals. A charge pump provides
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* LCD display supply which can be higher than supply voltage of the device.
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* Each LCD pin, segment or common terminals, can be configured as general purpose I/O pins
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* if not driven by LCD controller.
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*
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* \section asfdoc_sam0_drivers_slcd_special_considerations Special Considerations
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*
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* \subsection asfdoc_sam0_drivers_slcd_special_considerations_io I/O Lines
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*
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* The SLCD pins (SEG and COM) are multiplexed with other peripherals. The
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* user application must first configure the I/O controller, to give control of
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* the requisite pins to the SLCD.
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*
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* \subsection asfdoc_sam0_drivers_slcd_special_considerations_power Power Management
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*
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* The SLCD will continue to operate in any sleep mode where the selected source clock
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* is running. The SLCD interrupts can be used to wake up the device from sleep modes.
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* Events connected to the event system can trigger other operations in the system
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* without exiting sleep modes.
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*
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* The power consumption of SLCD itself can be minimized by:
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* - Using the lowest acceptable frame rate (refer to the LCD glass technical
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* characteristics)
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* - Using the low-power waveform (default mode)
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* - Using automated modes of operation
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* - Configuring the lowest possible contrast value
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*
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* \section asfdoc_sam0_drivers_slcd_extra_info Extra Information
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*
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* For extra information, see \ref asfdoc_sam0_drivers_slcd_extra. This includes:
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* - \ref asfdoc_sam0_drivers_slcd_extra_acronyms
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* - \ref asfdoc_sam0_drivers_slcd_extra_dependencies
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* - \ref asfdoc_sam0_drivers_slcd_extra_errata
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* - \ref asfdoc_sam0_drivers_slcd_extra_history
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*
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* \section asfdoc_sam0_drivers_slcd_examples Examples
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*
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* For a list of examples related to this driver, see
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* \ref asfdoc_sam0_drivers_slcd_exqsg.
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*
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*
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* \section asfdoc_sam0_drivers_slcd_api_overview API Overview
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* @{
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*/
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#include <compiler.h>
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#include <system.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* \brief SLCD frame counter definition
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*
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* Enum SLCD frame counter definition.
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*/
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enum slcd_frame_counter {
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/** SLCD frame counter 0 */
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SLCD_FRAME_COUNTER_0,
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/** SLCD frame counter 1 */
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SLCD_FRAME_COUNTER_1,
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/** SLCD frame counter 2 */
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SLCD_FRAME_COUNTER_2,
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};
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/**
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* \brief Waveform mode
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*
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* Enum waveform mode.
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*/
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enum slcd_waveform_mode {
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/** Low power waveform mode */
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SLCD_LOW_POWER_WAVEFORM_MODE = 0,
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/** Standard waveform mode */
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SLCD_STANDARD_WAVEFORM_MODE,
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};
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/**
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* \brief SLCD configuration structure
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*
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* Basic configuration for SLCDC.
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*/
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struct slcd_config {
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/** Keep SLCD enabled in standby sleep mode if true */
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bool run_in_standby;
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/** waveform mode selection */
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enum slcd_waveform_mode waveform_mode;
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/** Low resistance network duration */
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uint8_t low_resistance_duration;
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/** Enable Low resistance if true */
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bool enable_low_resistance;
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/** Bias buffer duration */
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uint8_t bias_buffer_duration;
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/** Enable bias buffer if true */
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bool enable_bias_buffer;
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};
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/**
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* \brief SLCD event enable/disable structure
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*
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* Event flags for the SLCD module. This is used to enable and
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* disable events via \ref slcd_enable_events() and \ref slcd_disable_events().
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*/
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struct slcd_events {
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/** Enable event generation on frame counter 0 overflow */
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bool generate_event_on_fc0_overflow;
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/** Enable event generation on frame counter 1 overflow */
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bool generate_event_on_fc1_overflow;
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/** Enable event generation on frame counter 2 overflow */
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bool generate_event_on_fc2_overflow;
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};
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/**
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* \brief SLCD blink configuration
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*
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* SLCD blink configuration.
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*/
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struct slcd_blink_config {
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/** Frame counter selection for blinking */
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enum slcd_frame_counter fc;
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/** All segments are allowed to blink if true, else only
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Selected segments are allowed to blink */
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bool blink_all_seg;
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};
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/**
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* \brief SLCD circular shift direction
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*
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* Enum SLCD circular shift direction.
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*/
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enum slcd_circular_shift_dir {
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/** Circular shift direction is left */
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SLCD_CIRCULAR_SHIFT_LEFT = 0,
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/** Circular shift direction is right */
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SLCD_CIRCULAR_SHIFT_RIGHT,
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};
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/**
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* \brief SLCD circular shift configuration
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*
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* SLCD circular shift configuration.
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*/
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struct slcd_circular_shift_config {
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/** Frame counter selection for circular shift */
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enum slcd_frame_counter fc;
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/** Shift direction */
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enum slcd_circular_shift_dir dir;
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/** Size of the circular shift register, MAX. size is 16 */
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uint8_t size;
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/** Circular shift register value */
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uint16_t data;
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};
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/**
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* \brief Automated char order
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*
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* Enum automated char order.
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*/
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enum slcd_automated_char_order {
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/** Segment is starting from bottom right */
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SLCD_AUTOMATED_CHAR_START_FROM_BOTTOM_RIGHT = 0,
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/** Segment is starting from bottom left */
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SLCD_AUTOMATED_CHAR_START_FROM_BOTTOM_LEFT,
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};
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/**
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* \brief Automated char display mode
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*
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* Enum automated char display mode.
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*/
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enum slcd_automated_char_mode {
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/** Sequential Display Mode */
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SLCD_AUTOMATED_CHAR_SEQ = 0,
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/** Scrolling Display Mode */
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SLCD_AUTOMATED_CHAR_SCROLL,
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};
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/**
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* \brief Automated char configuration
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*
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* SLCD automated char configuration.
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*/
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struct slcd_automated_char_config {
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/** Mapping order in automated char mode */
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enum slcd_automated_char_order order;
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/** Frame counter selection for automated character mapping */
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enum slcd_frame_counter fc;
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/** Display mode */
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enum slcd_automated_char_mode mode;
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/** Define the number of SEG line per digit,
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it equal to number of SEG line - 1 */
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uint8_t seg_line_num;
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/** Define the index of the first segment terminal of the digit to display */
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uint8_t start_seg_line;
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/** Define the number of digit per row */
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uint8_t row_digit_num;
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/** Define the number of digit, it must be greater than 1 */
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uint8_t digit_num;
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/** Define the number of steps in scrolling mode.
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scrolling_step = character string length - digit_num + 1 */
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uint8_t scrolling_step;
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/** Define the number of COM line per row,
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it equal to number of COM line - 1 */
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uint8_t com_line_num;
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/** Segments data mask */
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uint32_t data_mask;
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};
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/**
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* \name SLCD Basic Operation Functions
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* @{
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*/
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void slcd_get_config_defaults(struct slcd_config *config);
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enum status_code slcd_init(struct slcd_config *const config);
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void slcd_enable(void);
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void slcd_disable(void);
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bool slcd_is_enabled(void);
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void slcd_reset(void);
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enum status_code slcd_set_contrast(uint8_t contrast);
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/**
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* \brief Determines if SLCD module is currently synchronizing to the bus
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*
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* Checks to see if the underlying hardware peripheral module(s) are currently
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* synchronizing across multiple clock domains to the hardware bus, This
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* function can be used to delay further operations on a module until such time
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* that it is ready, to prevent blocking delays for synchronization in the
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* user application.
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*
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* \return Synchronization status of the underlying hardware module.
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*
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* \retval true If the module synchronization is ongoing
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* \retval false If the module has completed synchronization
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*/
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static inline bool slcd_is_syncing(void)
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{
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if (SLCD->SYNCBUSY.reg) {
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return true;
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}
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return false;
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}
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/**
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* \brief Lock shadow memory
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*
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* It allows update of shadow display memory. If the display memory
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* is modified, the display remains unchanged when locked.
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*/
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static inline void slcd_lock_shadow_memory(void)
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{
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SLCD->CTRLC.reg |= SLCD_CTRLC_LOCK;
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}
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/**
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* \brief Unlock shadow memory
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*
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* Unlock the shadow display memory.
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*/
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static inline void slcd_unlock_shadow_memory(void)
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{
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SLCD->CTRLC.reg &= (SLCD_CTRLC_MASK & ( ~SLCD_CTRLC_LOCK));
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}
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/**
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* \brief Clear display memory
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*
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* Clears immediately the display memory.
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*/
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static inline void slcd_clear_display_memory(void)
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{
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SLCD->CTRLC.reg |= SLCD_CTRLC_CLEAR;
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}
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/**
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* \brief Display enable
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*
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* Enable COM/SEG signal output.
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*/
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static inline void slcd_enable_display(void)
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{
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SLCD->CTRLD.reg |= SLCD_CTRLD_DISPEN;
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while (slcd_is_syncing()) {
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/* Wait for synchronization */
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}
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}
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/**
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* \brief Display disable
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*
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* Disable COM/SEG signal output.
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*/
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static inline void slcd_disable_display(void)
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{
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SLCD->CTRLD.reg &= (SLCD_CTRLD_MASK & ( ~SLCD_CTRLD_DISPEN));
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while (slcd_is_syncing()) {
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/* Wait for synchronization */
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}
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}
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/**
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* \brief DMA display memory update frame counter selection
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*
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* It's used to select the frame counter for DMA to update the display memory.
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*
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* \note It can be called only before the module is enabled.
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*
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* \param[in] fc Frame coungter index
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*/
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static inline void slcd_dma_display_memory_update_fc_sel(enum slcd_frame_counter fc)
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{
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SLCD->CTRLA.bit.DMFCS = fc;
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}
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/** @} */
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/**
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* \name SLCD Blink Functions
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* @{
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*/
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/**
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* \brief Blink mode enable
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*
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* Enable blink mode.
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*/
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static inline void slcd_enable_blink(void)
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{
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SLCD->CTRLD.reg |= SLCD_CTRLD_BLINK;
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while (slcd_is_syncing()) {
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/* Wait for synchronization */
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}
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}
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/**
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* \brief Blink mode disable
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*
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* Disable blink mode.
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*/
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static inline void slcd_disable_blink(void)
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{
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SLCD->CTRLD.reg &= ~SLCD_CTRLD_BLINK;
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while (slcd_is_syncing()) {
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/* Wait for synchronization */
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}
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}
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void slcd_blink_get_config_defaults(struct slcd_blink_config *blink_config);
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enum status_code slcd_blink_set_config(struct slcd_blink_config *const blink_config);
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void slcd_clear_blink_all_pixel(void);
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void slcd_clear_blink_pixel(uint8_t pix_com,uint8_t pix_seg);
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void slcd_set_blink_pixel(uint8_t pix_com,uint8_t pix_seg);
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/** @} */
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/**
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* \name SLCD Blank Functions
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* @{
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*/
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/**
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* \brief Blank mode enable
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*
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* Enable blank mode.
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*/
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static inline void slcd_enable_blank(void)
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{
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SLCD->CTRLD.reg |= SLCD_CTRLD_BLANK;
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while (slcd_is_syncing()) {
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/* Wait for synchronization */
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}
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}
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/**
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* \brief Blank mode disable
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*
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* Disable blank mode.
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*/
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static inline void slcd_disable_blank(void)
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{
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SLCD->CTRLD.reg &= ~SLCD_CTRLD_BLANK;
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while (slcd_is_syncing()) {
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/* Wait for synchronization */
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}
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}
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/** @} */
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/**
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* \name SLCD Event Functions
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* @{
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*/
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/**
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* \brief Enables a SLCD event output
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*
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* Enables one or more output events.
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*
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* \note Events cannot be altered while the module is enabled.
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*
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* \param[in] events Struct containing flags of events to enable
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*/
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static inline void slcd_enable_events(struct slcd_events *const events)
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{
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Assert(hw);
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Assert(events);
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uint8_t event_mask = 0;
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if (events->generate_event_on_fc0_overflow) {
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event_mask |= SLCD_EVCTRL_FC0OEO;
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}
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if (events->generate_event_on_fc1_overflow) {
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event_mask |= SLCD_EVCTRL_FC1OEO;
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}
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if (events->generate_event_on_fc2_overflow) {
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event_mask |= SLCD_EVCTRL_FC2OEO;
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}
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SLCD->EVCTRL.reg |= event_mask;
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}
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/**
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* \brief Disables a SLCD event output
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*
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* Disables one or more SLCD events output.
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*
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* \param[in] events Struct containing flags of events to disable
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*/
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static inline void slcd_disable_events(struct slcd_events *const events)
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{
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Assert(events);
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uint8_t event_mask = 0;
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if (events->generate_event_on_fc0_overflow) {
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event_mask |= SLCD_EVCTRL_FC0OEO;
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}
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if (events->generate_event_on_fc1_overflow) {
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event_mask |= SLCD_EVCTRL_FC1OEO;
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}
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|
|
if (events->generate_event_on_fc2_overflow) {
|
|
event_mask |= SLCD_EVCTRL_FC2OEO;
|
|
}
|
|
|
|
SLCD->EVCTRL.reg &= ~event_mask;
|
|
}
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* \name SLCD Frame Counter Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* \brief Frame counter configuration
|
|
*
|
|
* Config frame counter.
|
|
*
|
|
* \note Frame counter cannot be set while it is enabled.
|
|
*
|
|
* \param[in] fc Frame counter index
|
|
* \param[in] presc_bypass_enable Bypass of the frame counter prescaler
|
|
* \param[in] overflow_value Frame counter overflow value. The number of frame
|
|
* before overflow is ((overflow_value+1)*8) when presc_bypass_enable=0
|
|
else (overflow_value+1). The MAX. overflow value is 0x1FFFF.
|
|
*/
|
|
static inline void slcd_set_frame_counter(enum slcd_frame_counter fc,
|
|
bool presc_bypass_enable,
|
|
uint16_t overflow_value)
|
|
{
|
|
*(&(SLCD->FC0.reg) + fc) = (presc_bypass_enable << SLCD_FC0_PB_Pos)
|
|
| SLCD_FC0_OVF(overflow_value);
|
|
}
|
|
|
|
/**
|
|
* \brief Enables a frame counter
|
|
*
|
|
* Enables one frame counter.
|
|
*
|
|
* \param[in] fc Frame counter index
|
|
*/
|
|
static inline void slcd_enable_frame_counter(enum slcd_frame_counter fc)
|
|
{
|
|
|
|
switch(fc) {
|
|
case SLCD_FRAME_COUNTER_0:
|
|
SLCD->CTRLD.reg |= SLCD_CTRLD_FC0EN;
|
|
break;
|
|
case SLCD_FRAME_COUNTER_1:
|
|
SLCD->CTRLD.reg |= SLCD_CTRLD_FC1EN;
|
|
break;
|
|
case SLCD_FRAME_COUNTER_2:
|
|
SLCD->CTRLD.reg |= SLCD_CTRLD_FC2EN;
|
|
break;
|
|
default :
|
|
break;
|
|
}
|
|
while (slcd_is_syncing()) {
|
|
/* Wait for synchronization */
|
|
}
|
|
}
|
|
|
|
/**
|
|
* \brief Disable a frame counter.
|
|
*
|
|
* Disable one frame counter.
|
|
*
|
|
* \param[in] fc Frame counter index
|
|
*/
|
|
static inline void slcd_disable_frame_counter(enum slcd_frame_counter fc)
|
|
{
|
|
switch(fc) {
|
|
case SLCD_FRAME_COUNTER_0:
|
|
SLCD->CTRLD.reg &= ~SLCD_CTRLD_FC0EN;
|
|
break;
|
|
case SLCD_FRAME_COUNTER_1:
|
|
SLCD->CTRLD.reg &= ~SLCD_CTRLD_FC1EN;
|
|
break;
|
|
case SLCD_FRAME_COUNTER_2:
|
|
SLCD->CTRLD.reg &= ~SLCD_CTRLD_FC2EN;
|
|
break;
|
|
default :
|
|
break;
|
|
}
|
|
while (slcd_is_syncing()) {
|
|
/* Wait for synchronization */
|
|
}
|
|
}
|
|
/** @} */
|
|
|
|
/**
|
|
* \name Display Memory Functions
|
|
* CPU can access display memory in direct access or in indirect access.
|
|
* @{
|
|
*/
|
|
void slcd_set_display_memory(void);
|
|
void slcd_set_pixel(uint8_t pix_com, uint8_t pix_seg);
|
|
void slcd_clear_pixel(uint8_t pix_com, uint8_t pix_seg);
|
|
|
|
void slcd_set_seg_data(uint8_t seg_data, uint8_t byte_offset, uint8_t seg_mask);
|
|
/** @} */
|
|
|
|
/**
|
|
* \name Character Mapping Functions
|
|
* @{
|
|
*/
|
|
|
|
void slcd_character_map_set(
|
|
enum slcd_automated_char_order order,
|
|
uint8_t seg_line_num);
|
|
void slcd_character_write_data(uint8_t com_line_index,
|
|
uint8_t seg_line_index,
|
|
uint32_t seg_data,
|
|
uint32_t data_mask);
|
|
|
|
/**
|
|
* \brief Enables automated character display
|
|
*
|
|
* Enables automated character display.
|
|
*/
|
|
static inline void slcd_enable_automated_character(void)
|
|
{
|
|
SLCD->CTRLC.reg |= SLCD_CTRLC_ACMEN;
|
|
}
|
|
|
|
/**
|
|
* \brief Disables automated character display
|
|
*
|
|
* Disables automated character display.
|
|
*/
|
|
static inline void slcd_disable_automated_character(void)
|
|
{
|
|
SLCD->CTRLC.reg &= ~SLCD_CTRLC_ACMEN;
|
|
}
|
|
void slcd_automated_char_get_config_default(
|
|
struct slcd_automated_char_config *config);
|
|
enum status_code slcd_automated_char_set_config(
|
|
struct slcd_automated_char_config *const config);
|
|
/** @} */
|
|
|
|
/**
|
|
* \name Automated Bit Mapping Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* \brief Enables automated bit display
|
|
*
|
|
* Enables automated bit display.
|
|
*/
|
|
static inline void slcd_enable_automated_bit(void)
|
|
{
|
|
SLCD->CTRLC.reg |= SLCD_CTRLC_ABMEN;
|
|
}
|
|
|
|
/**
|
|
* \brief Disables automated bit display
|
|
*
|
|
* Disables automated bit display.
|
|
*/
|
|
static inline void slcd_disable_automated_bit(void)
|
|
{
|
|
SLCD->CTRLC.reg &= ~SLCD_CTRLC_ABMEN;
|
|
}
|
|
|
|
/**
|
|
* \brief Sets automated bit display
|
|
*
|
|
* Sets automated bit display.
|
|
*
|
|
* \note Automated bit cannot be set while it is enabled or busy.
|
|
*/
|
|
static inline void slcd_set_automated_bit(uint8_t size,enum slcd_frame_counter fc)
|
|
{
|
|
if(size > 0 && size < 0x3f) {
|
|
SLCD->ABMCFG.reg = SLCD_ABMCFG_SIZE(size) | SLCD_ABMCFG_FCS(fc);
|
|
}
|
|
}
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* \name Autonomous Segment Animation
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* \brief Enable SLCD circular shift mode
|
|
*/
|
|
static inline void slcd_enable_circular_shift(void)
|
|
{
|
|
SLCD->CTRLD.reg |= SLCD_CTRLD_CSREN;
|
|
while (slcd_is_syncing()) {
|
|
/* Wait for synchronization */
|
|
}
|
|
}
|
|
/**
|
|
* \brief Disable SLCD circular shift mode
|
|
*/
|
|
static inline void slcd_disable_circular_shift(void)
|
|
{
|
|
SLCD->CTRLD.reg &= ~SLCD_CTRLD_CSREN;
|
|
while (slcd_is_syncing()) {
|
|
/* Wait for synchronization */
|
|
}
|
|
}
|
|
void slcd_circular_shift_get_config_defaults(
|
|
struct slcd_circular_shift_config *const config);
|
|
|
|
enum status_code slcd_circular_shift_set_config(
|
|
struct slcd_circular_shift_config *const config);
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* \name SLCD Status
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* \brief Checks if auto bit mapping state machine is busy
|
|
*
|
|
* Checks if auto bit mapping state machine is busy or not.
|
|
*
|
|
* \retval true Auto bit mapping state machine is busy
|
|
* \retval false Auto bit mapping state machine is idle
|
|
*/
|
|
|
|
static inline bool slcd_get_auto_bit_status(void)
|
|
{
|
|
return ((SLCD->STATUS.reg & SLCD_STATUS_ABMBUSY) == SLCD_STATUS_ABMBUSY);
|
|
}
|
|
|
|
/**
|
|
* \brief Checks if auto character mapping state machine is busy
|
|
*
|
|
* Checks if auto character state machine is busy or not.
|
|
*
|
|
* \retval true Auto character mapping state machine is busy
|
|
* \retval false Auto character mapping state machine is idle
|
|
*/
|
|
|
|
static inline bool slcd_get_auto_char_status(void)
|
|
{
|
|
return ((SLCD->STATUS.reg & SLCD_STATUS_ACMBUSY) == SLCD_STATUS_ACMBUSY);
|
|
}
|
|
|
|
/**
|
|
* \brief Checks if character writing function is busy
|
|
*
|
|
* Checksif character writing function is busy or not.
|
|
*
|
|
* \retval true Character writting function is busy
|
|
* \retval false Character writting function is ready for use
|
|
*/
|
|
|
|
static inline bool slcd_get_char_writing_status(void)
|
|
{
|
|
return ((SLCD->STATUS.reg & SLCD_STATUS_CMWRBUSY) == SLCD_STATUS_CMWRBUSY);
|
|
}
|
|
|
|
/**
|
|
* \brief Checks VLCD and VDD33 status
|
|
*
|
|
* Checks VLCD and VDD33 status.
|
|
*
|
|
* \retval true VDD33 is greater than target VLCD
|
|
* \retval false Target VLCD is greater than vdd33
|
|
*/
|
|
|
|
static inline bool slcd_get_vlcd_vdd33_status(void)
|
|
{
|
|
return ((SLCD->STATUS.reg & SLCD_STATUS_VLCDS) == SLCD_STATUS_VLCDS);
|
|
}
|
|
|
|
/**
|
|
* \brief Checks LCD charge pump status
|
|
*
|
|
* Checks LCD Charge Pump Status.
|
|
*
|
|
* \retval true LCD power charge pump is running
|
|
* \retval false LCD power charge pump is stopped
|
|
*/
|
|
|
|
static inline bool slcd_get_charge_pump_status(void)
|
|
{
|
|
return ((SLCD->STATUS.reg & SLCD_STATUS_PRUN) == SLCD_STATUS_PRUN);
|
|
}
|
|
|
|
/**
|
|
* \brief Checks if VLCD is ready
|
|
*
|
|
* Checks if VLCD is well regulated to the target value.
|
|
*
|
|
* \retval true VLCD is well regulated to the target value
|
|
* \retval false VLCD is not well regulated to the target value
|
|
*/
|
|
|
|
static inline bool slcd_get_vlcd_ready_status(void)
|
|
{
|
|
return ((SLCD->STATUS.reg & SLCD_STATUS_VLCDR) == SLCD_STATUS_VLCDR);
|
|
}
|
|
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* \page asfdoc_sam0_drivers_slcd_extra Extra Information for SLCD
|
|
*
|
|
* \section asfdoc_sam0_drivers_slcd_extra_acronyms Acronyms
|
|
* Below is a table listing the acronyms used in this module, along with their
|
|
* intended meanings.
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Acronym</th>
|
|
* <th>Definition</th>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>SLCD</td>
|
|
* <td>Segment Liquid Crystal Display</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>COM</td>
|
|
* <td>Common, denotes how many segments are connected to a segment terminal</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>SEG</td>
|
|
* <td>Segment, the least viewing element (pixel) which can be on or off</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Duty</td>
|
|
* <td> 1/(Number of common terminals on an actual LCD display)</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Bias</td>
|
|
* <td>1/(Number of voltage levels used driving a LCD display -1)</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Frame Rate</td>
|
|
* <td>Number of times the LCD segments are energized per second</td>
|
|
* </tr>
|
|
* </table>
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_drivers_slcd_extra_dependencies Dependencies
|
|
* This driver has the following dependencies:
|
|
*
|
|
* - None
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_drivers_slcd_extra_errata Errata
|
|
* There are no errata related to this driver.
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_drivers_slcd_extra_history Module History
|
|
* An overview of the module history is presented in the table below, with
|
|
* details on the enhancements and fixes made to the module since its first
|
|
* release. The current version of this corresponds to the newest version in
|
|
* the table.
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Changelog</th>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Initial release</td>
|
|
* </tr>
|
|
* </table>
|
|
*/
|
|
|
|
/**
|
|
* \page asfdoc_sam0_drivers_slcd_exqsg Examples for SLCD
|
|
*
|
|
* This is a list of the available Quick Start Guides (QSGs) and example
|
|
* applications for \ref asfdoc_sam0_drivers_slcd_group. QSGs are simple examples with
|
|
* step-by-step instructions to configure and use this driver in a selection of
|
|
* use cases. Note that a QSG can be compiled as a standalone application or be
|
|
* added to the user application.
|
|
*
|
|
* - \subpage asfdoc_sam0_slcd_basic_use_case
|
|
*
|
|
* \page asfdoc_sam0_drivers_slcd_document_revision_history Document Revision History
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Doc. rev.</th>
|
|
* <th>Date</th>
|
|
* <th>Comments</th>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>42605A</td>
|
|
* <td>12/2015</td>
|
|
* <td>Initial release</td>
|
|
* </tr>
|
|
* </table>
|
|
*
|
|
*/
|
|
|
|
#endif /* SLCD_H_INCLUDED */
|