563 lines
14 KiB
C
563 lines
14 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-01-07 shelton first version
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* 2021-10-28 jonas optimization design pin-index algorithm
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*/
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#include <board.h>
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#include "drv_gpio.h"
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#ifdef RT_USING_PIN
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#define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
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#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
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#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
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#define PIN_ATPORTSOURCE(pin) ((uint8_t)(((pin) & 0xF0u) >> 4))
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#define PIN_ATPINSOURCE(pin) ((uint8_t)((pin) & 0xFu))
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#define PIN_ATPORT(pin) ((GPIO_Type *)(GPIOA_BASE + (0x400u * PIN_PORT(pin))))
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#define PIN_ATPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
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#if defined(GPIOZ)
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#define __AT32_PORT_MAX 12u
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#elif defined(GPIOK)
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#define __AT32_PORT_MAX 11u
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#elif defined(GPIOJ)
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#define __AT32_PORT_MAX 10u
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#elif defined(GPIOI)
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#define __AT32_PORT_MAX 9u
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#elif defined(GPIOH)
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#define __AT32_PORT_MAX 8u
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#elif defined(GPIOG)
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#define __AT32_PORT_MAX 7u
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#elif defined(GPIOF)
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#define __AT32_PORT_MAX 6u
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#elif defined(GPIOE)
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#define __AT32_PORT_MAX 5u
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#elif defined(GPIOD)
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#define __AT32_PORT_MAX 4u
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#elif defined(GPIOC)
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#define __AT32_PORT_MAX 3u
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#elif defined(GPIOB)
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#define __AT32_PORT_MAX 2u
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#elif defined(GPIOA)
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#define __AT32_PORT_MAX 1u
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#else
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#define __AT32_PORT_MAX 0u
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#error Unsupported AT32 GPIO peripheral.
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#endif
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#define PIN_ATPORT_MAX __AT32_PORT_MAX
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static const struct pin_irq_map pin_irq_map[] =
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{
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{GPIO_Pins_0, EXTI_Line0, EXTI0_IRQn},
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{GPIO_Pins_1, EXTI_Line1, EXTI1_IRQn},
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{GPIO_Pins_2, EXTI_Line2, EXTI2_IRQn},
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{GPIO_Pins_3, EXTI_Line3, EXTI3_IRQn},
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{GPIO_Pins_4, EXTI_Line4, EXTI4_IRQn},
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{GPIO_Pins_5, EXTI_Line5, EXTI9_5_IRQn},
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{GPIO_Pins_6, EXTI_Line6, EXTI9_5_IRQn},
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{GPIO_Pins_7, EXTI_Line7, EXTI9_5_IRQn},
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{GPIO_Pins_8, EXTI_Line8, EXTI9_5_IRQn},
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{GPIO_Pins_9, EXTI_Line9, EXTI9_5_IRQn},
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{GPIO_Pins_10, EXTI_Line10, EXTI15_10_IRQn},
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{GPIO_Pins_11, EXTI_Line11, EXTI15_10_IRQn},
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{GPIO_Pins_12, EXTI_Line12, EXTI15_10_IRQn},
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{GPIO_Pins_13, EXTI_Line13, EXTI15_10_IRQn},
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{GPIO_Pins_14, EXTI_Line14, EXTI15_10_IRQn},
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{GPIO_Pins_15, EXTI_Line15, EXTI15_10_IRQn},
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};
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static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
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{
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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};
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static uint32_t pin_irq_enable_mask = 0;
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#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
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static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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if (PIN_PORT(pin) < PIN_ATPORT_MAX)
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{
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gpio_port = PIN_ATPORT(pin);
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gpio_pin = PIN_ATPIN(pin);
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}
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else
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{
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return;
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}
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GPIO_WriteBit(gpio_port, gpio_pin, (BitState)value);
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}
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static int at32_pin_read(rt_device_t dev, rt_base_t pin)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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int value;
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value = PIN_LOW;
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if (PIN_PORT(pin) < PIN_ATPORT_MAX)
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{
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gpio_port = PIN_ATPORT(pin);
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gpio_pin = PIN_ATPIN(pin);
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value = GPIO_ReadInputDataBit(gpio_port, gpio_pin);
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}
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return value;
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}
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static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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GPIO_InitType GPIO_InitStruct;
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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if (PIN_PORT(pin) < PIN_ATPORT_MAX)
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{
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gpio_port = PIN_ATPORT(pin);
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gpio_pin = PIN_ATPIN(pin);
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}
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else
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{
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return;
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}
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/* Configure GPIO_InitStructure */
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pins = gpio_pin;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP;
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GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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if (mode == PIN_MODE_OUTPUT)
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{
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/* output setting */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP;
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}
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else if (mode == PIN_MODE_INPUT)
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{
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/* input setting: not pull. */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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}
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else if (mode == PIN_MODE_INPUT_PULLUP)
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{
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/* input setting: pull up. */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_PU;
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}
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else if (mode == PIN_MODE_INPUT_PULLDOWN)
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{
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/* input setting: pull down. */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_PD;
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}
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else if (mode == PIN_MODE_OUTPUT_OD)
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{
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/* output setting: od. */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_OD;
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}
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GPIO_Init(gpio_port, &GPIO_InitStruct);
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}
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rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
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{
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int i;
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for (i = 0; i < 32; i++)
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{
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if ((0x01 << i) == bit)
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{
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return i;
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}
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}
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return -1;
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}
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rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
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{
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rt_int32_t mapindex = bit2bitno(pinbit);
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if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
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{
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return RT_NULL;
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}
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return &pin_irq_map[mapindex];
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};
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static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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RT_UNUSED(gpio_port);
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if (PIN_PORT(pin) < PIN_ATPORT_MAX)
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{
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gpio_port = PIN_ATPORT(pin);
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gpio_pin = PIN_ATPIN(pin);
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}
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else
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{
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return -RT_EINVAL;
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}
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irqindex = bit2bitno(gpio_pin);
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return -RT_EINVAL;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == pin &&
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pin_irq_hdr_tab[irqindex].hdr == hdr &&
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pin_irq_hdr_tab[irqindex].mode == mode &&
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pin_irq_hdr_tab[irqindex].args == args)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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if (pin_irq_hdr_tab[irqindex].pin != -1)
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{
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rt_hw_interrupt_enable(level);
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return -RT_EBUSY;
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}
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pin_irq_hdr_tab[irqindex].pin = pin;
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pin_irq_hdr_tab[irqindex].hdr = hdr;
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pin_irq_hdr_tab[irqindex].mode = mode;
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pin_irq_hdr_tab[irqindex].args = args;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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RT_UNUSED(gpio_port);
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if (PIN_PORT(pin) < PIN_ATPORT_MAX)
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{
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gpio_port = PIN_ATPORT(pin);
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gpio_pin = PIN_ATPIN(pin);
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}
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else
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{
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return -RT_EINVAL;
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}
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irqindex = bit2bitno(gpio_pin);
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return -RT_EINVAL;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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pin_irq_hdr_tab[irqindex].pin = -1;
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pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
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pin_irq_hdr_tab[irqindex].mode = 0;
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pin_irq_hdr_tab[irqindex].args = RT_NULL;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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GPIO_InitType GPIO_InitStruct;
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EXTI_InitType EXTI_InitStruct;
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NVIC_InitType NVIC_InitStruct;
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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const struct pin_irq_map *irqmap;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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if (PIN_PORT(pin) < PIN_ATPORT_MAX)
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{
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gpio_port = PIN_ATPORT(pin);
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gpio_pin = PIN_ATPIN(pin);
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}
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else
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{
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return -RT_EINVAL;
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}
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if (enabled == PIN_IRQ_ENABLE)
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{
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irqindex = bit2bitno(gpio_pin);
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return -RT_EINVAL;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return -RT_EINVAL;
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}
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irqmap = &pin_irq_map[irqindex];
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/* Configure GPIO_InitStructure */
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GPIO_StructInit(&GPIO_InitStruct);
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EXTI_StructInit(&EXTI_InitStruct);
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GPIO_InitStruct.GPIO_Pins = irqmap->pinbit;
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GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
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EXTI_InitStruct.EXTI_Line = irqmap->pinbit;
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EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
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EXTI_InitStruct.EXTI_LineEnable = ENABLE;
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switch (pin_irq_hdr_tab[irqindex].mode)
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{
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case PIN_IRQ_MODE_RISING:
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EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising;
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break;
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case PIN_IRQ_MODE_FALLING:
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EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
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break;
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case PIN_IRQ_MODE_RISING_FALLING:
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EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
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break;
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}
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GPIO_Init(gpio_port, &GPIO_InitStruct);
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GPIO_EXTILineConfig(PIN_ATPORTSOURCE(pin), PIN_ATPINSOURCE(pin));
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EXTI_Init(&EXTI_InitStruct);
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NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
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NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
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NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 5;
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NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
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NVIC_Init(&NVIC_InitStruct);
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pin_irq_enable_mask |= irqmap->pinbit;
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rt_hw_interrupt_enable(level);
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}
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else if (enabled == PIN_IRQ_DISABLE)
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{
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irqmap = get_pin_irq_map(gpio_pin);
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if (irqmap == RT_NULL)
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{
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return -RT_EINVAL;
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}
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level = rt_hw_interrupt_disable();
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pin_irq_enable_mask &= ~irqmap->pinbit;
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NVIC_InitStruct.NVIC_IRQChannelCmd = DISABLE;
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NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 5;
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NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
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if ((irqmap->pinbit >= GPIO_Pins_5) && (irqmap->pinbit <= GPIO_Pins_9))
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{
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if (!(pin_irq_enable_mask & (GPIO_Pins_5 | GPIO_Pins_6 | GPIO_Pins_7 | GPIO_Pins_8 | GPIO_Pins_9)))
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{
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NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
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}
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}
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else if ((irqmap->pinbit >= GPIO_Pins_10) && (irqmap->pinbit <= GPIO_Pins_15))
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{
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if (!(pin_irq_enable_mask & (GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13 | GPIO_Pins_14 | GPIO_Pins_15)))
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{
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NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
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}
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}
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else
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{
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NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
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}
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NVIC_Init(&NVIC_InitStruct);
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rt_hw_interrupt_enable(level);
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}
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else
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{
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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const static struct rt_pin_ops _at32_pin_ops =
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{
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at32_pin_mode,
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at32_pin_write,
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at32_pin_read,
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at32_pin_attach_irq,
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at32_pin_dettach_irq,
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at32_pin_irq_enable,
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RT_NULL,
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};
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rt_inline void pin_irq_hdr(int irqno)
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{
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EXTI_ClearIntPendingBit(pin_irq_map[irqno].lineno);
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if (pin_irq_hdr_tab[irqno].hdr)
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{
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pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
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}
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}
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void GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
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{
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pin_irq_hdr(bit2bitno(GPIO_Pin));
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}
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void EXTI0_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_IRQHandler(GPIO_Pins_0);
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rt_interrupt_leave();
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}
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void EXTI1_IRQHandler(void)
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{
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rt_interrupt_enter();
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EXTI_ClearIntPendingBit(GPIO_Pins_1);
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GPIO_EXTI_IRQHandler(GPIO_Pins_1);
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rt_interrupt_leave();
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}
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void EXTI2_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_IRQHandler(GPIO_Pins_2);
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rt_interrupt_leave();
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}
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void EXTI3_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_IRQHandler(GPIO_Pins_3);
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rt_interrupt_leave();
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}
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void EXTI4_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_IRQHandler(GPIO_Pins_4);
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rt_interrupt_leave();
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}
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void EXTI9_5_IRQHandler(void)
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{
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rt_interrupt_enter();
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if (RESET != EXTI_GetIntStatus(EXTI_Line5))
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{
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GPIO_EXTI_IRQHandler(GPIO_Pins_5);
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}
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if (RESET != EXTI_GetIntStatus(EXTI_Line6))
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{
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GPIO_EXTI_IRQHandler(GPIO_Pins_6);
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}
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if (RESET != EXTI_GetIntStatus(EXTI_Line7))
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{
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GPIO_EXTI_IRQHandler(GPIO_Pins_7);
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}
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if (RESET != EXTI_GetIntStatus(EXTI_Line8))
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{
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GPIO_EXTI_IRQHandler(GPIO_Pins_8);
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}
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if (RESET != EXTI_GetIntStatus(EXTI_Line9))
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{
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GPIO_EXTI_IRQHandler(GPIO_Pins_9);
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}
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rt_interrupt_leave();
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}
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void EXTI15_10_IRQHandler(void)
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{
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rt_interrupt_enter();
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|
if (RESET != EXTI_GetIntStatus(EXTI_Line10))
|
|
{
|
|
GPIO_EXTI_IRQHandler(GPIO_Pins_10);
|
|
}
|
|
if (RESET != EXTI_GetIntStatus(EXTI_Line11))
|
|
{
|
|
GPIO_EXTI_IRQHandler(GPIO_Pins_11);
|
|
}
|
|
if (RESET != EXTI_GetIntStatus(EXTI_Line12))
|
|
{
|
|
GPIO_EXTI_IRQHandler(GPIO_Pins_12);
|
|
}
|
|
if (RESET != EXTI_GetIntStatus(EXTI_Line13))
|
|
{
|
|
GPIO_EXTI_IRQHandler(GPIO_Pins_13);
|
|
}
|
|
if (RESET != EXTI_GetIntStatus(EXTI_Line14))
|
|
{
|
|
GPIO_EXTI_IRQHandler(GPIO_Pins_14);
|
|
}
|
|
if (RESET != EXTI_GetIntStatus(EXTI_Line15))
|
|
{
|
|
GPIO_EXTI_IRQHandler(GPIO_Pins_15);
|
|
}
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
int rt_hw_pin_init(void)
|
|
{
|
|
|
|
#ifdef GPIOA
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
|
|
#endif
|
|
#ifdef GPIOB
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOB, ENABLE);
|
|
#endif
|
|
#ifdef GPIOC
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOC, ENABLE);
|
|
#endif
|
|
#ifdef GPIOD
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOD, ENABLE);
|
|
#endif
|
|
#ifdef GPIOE
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOE, ENABLE);
|
|
#endif
|
|
#ifdef GPIOF
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOF, ENABLE);
|
|
#endif
|
|
#ifdef GPIOG
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOG, ENABLE);
|
|
#endif
|
|
|
|
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_AFIO, ENABLE);
|
|
|
|
return rt_device_pin_register("pin", &_at32_pin_ops, RT_NULL);
|
|
}
|
|
|
|
INIT_BOARD_EXPORT(rt_hw_pin_init);
|
|
|
|
#endif /* RT_USING_PIN */
|