125 lines
3.2 KiB
C
125 lines
3.2 KiB
C
/*****************************************************************************
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* @brief provide system init routine/configuration for NV32Fxx.
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*
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*******************************************************************************/
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#include "common.h"
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#include "sysinit.h"
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#include "sim.h"
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#include "uart.h"
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#include "ics.h"
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/********************************************************************/
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uint16_t global_pass_count = 0;
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uint16_t global_fail_count = 0;
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void print_sys_log(void);
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void UART_InitPrint(void);
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/*****************************************************************************//*!
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+FUNCTION----------------------------------------------------------------
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* @function name: sysinit
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*
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* @brief initalize system including SIM, ICS, UART, etc
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*
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* @param none
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*
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* @return none
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*
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* @ Pass/ Fail criteria: none
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*****************************************************************************/
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void sysinit (void)
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{
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SIM_ConfigType sSIMConfig = {{0}, 0};
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ICS_ConfigType sICSConfig = {0};
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/* initialize the Pass/Fail counts to 0 */
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global_pass_count = 0;
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global_fail_count = 0;
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EFMCR &= 0xFFFF0001; // set wait state 1
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#if defined(TRIM_IRC)
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/* if not trimmed, do trim first */
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ICS_Trim(ICS_TRIM_VALUE);
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#endif
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/*
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* Enable SWD pin, RESET pin
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*/
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/*
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* NOTE: please make sure other register bits are also write-once and
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* need add other bit mask here if needed.
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*/
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#if defined(SPI0_PINREMAP)
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sSIMConfig.u32PinSel |= SIM_PINSEL_SPI0PS_MASK;
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#endif
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#if defined(OUTPUT_BUSCLK)
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sSIMConfig.sBits.bEnableCLKOUT = 1; /* output bus clock if enabled */
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#endif
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#if defined(DISABLE_NMI)
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sSIMConfig.sBits.bDisableNMI = 1;
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#endif
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#if !defined(CPU_NV32M3)
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/* make sure clocks to peripheral modules are enabled */
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sSIMConfig.u32SCGC |= SIM_SCGC_SWD_MASK | SIM_SCGC_FLASH_MASK |
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SIM_SCGC_UART0_MASK | SIM_SCGC_UART1_MASK |
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SIM_SCGC_UART2_MASK
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;
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#else
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sSIMConfig.u32SCGC |= SIM_SCGC_SWD_MASK | SIM_SCGC_FLASH_MASK |
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SIM_SCGC_UART0_MASK
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;
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#endif
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#if !defined(CPU_NV32)
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/* bus clock divided by 2 */
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// sSIMConfig.u32BusDiv |= SIM_CLKDIV_OUTDIV2_MASK;
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#endif
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// sSIMConfig.sBits.bBusDiv |= SIM_BUSDIV_BUSDIV_MASK;
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SIM_Init(&sSIMConfig); /* initialize SIM */
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#if defined(XOSC_STOP_ENABLE)
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sICSConfig.oscConfig.bStopEnable = 1; /* enabled in stop mode */
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#endif
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#if defined(CRYST_HIGH_GAIN)
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sICSConfig.oscConfig.bGain = 1; /* high gain */
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#endif
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#if (EXT_CLK_FREQ_KHZ >=4000)
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sICSConfig.oscConfig.bRange = 1; /* high range */
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#endif
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sICSConfig.oscConfig.bEnable = 1; /* enable OSC */
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sICSConfig.u32ClkFreq = EXT_CLK_FREQ_KHZ;
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#if defined(USE_FEE)
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sICSConfig.u8ClkMode = ICS_CLK_MODE_FEE;
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#elif defined(USE_FBE_OSC)
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sICSConfig.u8ClkMode = ICS_CLK_MODE_FBE_OSC;
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#elif defined(USE_FEE_OSC)
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sICSConfig.u8ClkMode = ICS_CLK_MODE_FEE_OSC;
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#elif defined(USE_FBILP)
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sICSConfig.u8ClkMode = ICS_CLK_MODE_FBILP;
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#elif defined(USE_FBELP)
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sICSConfig.u8ClkMode = ICS_CLK_MODE_FBELP;
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#endif
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ICS_Init(&sICSConfig); /* initialize ICS */
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}
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void NMI_Handler(void)
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{
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while(1);
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}
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