222 lines
6.3 KiB
C
222 lines
6.3 KiB
C
/*
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* File : interrupt.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2011-01-13 weety first version
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* 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
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*/
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#include <rthw.h>
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#include "asm9260t.h"
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#include "interrupt.h"
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#define MAX_HANDLERS (64)
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extern rt_uint32_t rt_interrupt_nest;
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/* exception and interrupt handler table */
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struct rt_irq_desc irq_desc[MAX_HANDLERS];
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rt_uint32_t rt_interrupt_from_thread;
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rt_uint32_t rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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/* --------------------------------------------------------------------
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* Interrupt initialization
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* -------------------------------------------------------------------- */
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/*
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* The default interrupt priority levels (0 = lowest, 3 = highest).
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*/
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static rt_uint32_t default_irq_priority[MAX_HANDLERS/4] =
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{
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0x00000000UL, /* INT3 - INT0 */
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0x00000000UL, /* INT7 - INT4 */
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0x00000000UL, /* INT11 - INT8 */
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0x02000000UL, /* INT15 - INT12 */
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0x02020202UL, /* INT19 - INT16 */
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0x02020202UL, /* INT23 - INT20 */
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0x00000002UL, /* INT27 - INT24 */
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0x01010100UL, /* INT31 - INT28 */
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0x00000001UL, /* INT35 - INT32 */
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0x00000000UL, /* INT39 - INT36 */
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0x00000000UL, /* INT43 - INT40 */
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0x00000000UL, /* INT47 - INT44 */
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0x00000000UL, /* INT51 - INT48 */
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0x00000000UL, /* INT55 - INT52 */
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0x00000000UL, /* INT59 - INT56 */
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0x00000000UL, /* INT63 - INT60 */
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};
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void rt_hw_interrupt_mask(int irq);
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void rt_hw_interrupt_umask(int irq);
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rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
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{
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rt_kprintf("UN-handled interrupt %d occurred!!!\n", vector);
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return RT_NULL;
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}
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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register rt_uint32_t idx;
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/* Initialize the ICOLL interrupt controller */
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outl((1<<8), REG_SET(HW_AHBCLKCTRL1)); // Enable ICOLL clock
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outl((1<<8), REG_CLR(HW_PRESETCTRL1)); // Reset ICOLL start
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outl((1<<8), REG_SET(HW_PRESETCTRL1)); // Reset ICOLL stop
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for(idx = 0; idx < (MAX_HANDLERS/4); idx++)
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{
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rt_uint32_t reg = (HW_ICOLL_PRIORITY0 + 0x10*idx);
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outl(default_irq_priority[idx], REG_VAL(reg));
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}
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/* init exceptions table */
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for(idx=0; idx < MAX_HANDLERS; idx++)
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{
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irq_desc[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
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irq_desc[idx].param = RT_NULL;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_snprintf(irq_desc[idx].name, RT_NAME_MAX - 1, "default");
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irq_desc[idx].counter = 0;
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#endif
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}
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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outl(0x00000000, REG_CLR(HW_ICOLL_VBASE)); //todo: fix this bug
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outl(0x00020000, REG_CLR(HW_ICOLL_CTRL)); // Clear CTRL REG
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outl(0x00050000, REG_SET(HW_ICOLL_CTRL));
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outl(0x00000004, HW_ICOLL_UNDEF_VECTOR);
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outl(~0UL, REG_CLR(HW_ICOLL_CLEAR0));
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outl(~0UL, REG_CLR(HW_ICOLL_CLEAR1));
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int irq)
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{
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rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((irq & 0x3CUL) << 2);
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rt_uint32_t bit = 4UL << ((irq & 3UL)<<3);
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outl(bit, REG_CLR(reg));
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int irq)
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{
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rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((irq & 0x3CUL) << 2);
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rt_uint32_t bit = 4UL << ((irq & 3UL)<<3);
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outl(bit, REG_SET(reg));
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param handler the interrupt service routine to be installed
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* @param param the interrupt service function parameter
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* @param name the interrupt name
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* @return old handler
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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void *param, char *name)
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if(vector < MAX_HANDLERS)
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{
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old_handler = irq_desc[vector].handler;
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if (handler != RT_NULL)
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{
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irq_desc[vector].handler = (rt_isr_handler_t)handler;
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irq_desc[vector].param = param;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
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irq_desc[vector].counter = 0;
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#endif
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}
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}
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return old_handler;
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}
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rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
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{
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//volatile rt_uint32_t irqstat;
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rt_uint32_t id;
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/* AIC need this dummy read */
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inl(HW_ICOLL_VECTOR);
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/* get irq number */
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id = inl(HW_ICOLL_STAT);
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/* clear pending register */
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//irqstat = inl(HW_ICOLL_VECTOR);
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return id;
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}
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void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
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{
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rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((id & 0x3CUL) << 2);
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rt_uint32_t level = 1UL << (0x3 & (inl(REG_VAL(reg)) >>((id & 3UL)<<3)));
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if(id & 0x20)
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outl((1UL<<(id&0x1F)), REG_SET(HW_ICOLL_CLEAR1));
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else
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outl((1UL<<id), REG_SET(HW_ICOLL_CLEAR0));
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outl(level, HW_ICOLL_LEVELACK);
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}
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#ifdef RT_USING_FINSH
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void list_irq(void)
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{
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int irq;
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rt_kprintf("number\tcount\tname\n");
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for (irq = 0; irq < MAX_HANDLERS; irq++)
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{
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if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
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{
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rt_kprintf("%02ld: %10ld %s\n",
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irq, irq_desc[irq].counter, irq_desc[irq].name);
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}
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}
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}
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#include <finsh.h>
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FINSH_FUNCTION_EXPORT(list_irq, list system irq);
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#endif
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