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f51bce3fed
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
78 lines
2.5 KiB
C
78 lines
2.5 KiB
C
/** @file reg_vim.h
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* @brief VIM Register Layer Header File
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* @date 23.May.2013
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* @version 03.05.01
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*
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* This file contains:
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* - Definitions
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* - Types
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* .
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* which are relevant for the System driver.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __REG_VIM_H__
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#define __REG_VIM_H__
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#include "sys_common.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* Vim Register Frame Definition */
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/** @struct vimBase
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* @brief Vim Register Frame Definition
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*
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* This type is used to access the Vim Registers.
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*/
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/** @typedef vimBASE_t
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* @brief VIM Register Frame Type Definition
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*
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* This type is used to access the VIM Registers.
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*/
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typedef volatile struct vimBase
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{
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uint32 IRQINDEX; /* 0x0000 */
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uint32 FIQINDEX; /* 0x0004 */
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uint32 rsvd1; /* 0x0008 */
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uint32 rsvd2; /* 0x000C */
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uint32 FIRQPR0; /* 0x0010 */
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uint32 FIRQPR1; /* 0x0014 */
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uint32 FIRQPR2; /* 0x0018 */
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uint32 FIRQPR3; /* 0x001C */
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uint32 INTREQ0; /* 0x0020 */
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uint32 INTREQ1; /* 0x0024 */
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uint32 INTREQ2; /* 0x0028 */
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uint32 INTREQ3; /* 0x002C */
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uint32 REQMASKSET0; /* 0x0030 */
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uint32 REQMASKSET1; /* 0x0034 */
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uint32 REQMASKSET2; /* 0x0038 */
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uint32 REQMASKSET3; /* 0x003C */
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uint32 REQMASKCLR0; /* 0x0040 */
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uint32 REQMASKCLR1; /* 0x0044 */
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uint32 REQMASKCLR2; /* 0x0048 */
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uint32 REQMASKCLR3; /* 0x004C */
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uint32 WAKEMASKSET0; /* 0x0050 */
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uint32 WAKEMASKSET1; /* 0x0054 */
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uint32 WAKEMASKSET2; /* 0x0058 */
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uint32 WAKEMASKSET3; /* 0x005C */
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uint32 WAKEMASKCLR0; /* 0x0060 */
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uint32 WAKEMASKCLR1; /* 0x0064 */
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uint32 WAKEMASKCLR2; /* 0x0068 */
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uint32 WAKEMASKCLR3; /* 0x006C */
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uint32 IRQVECREG; /* 0x0070 */
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uint32 FIQVECREG; /* 0x0074 */
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uint32 CAPEVT; /* 0x0078 */
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uint32 rsvd3; /* 0x007C */
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uint32 CHANCTRL[24U]; /* 0x0080-0x017C */
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} vimBASE_t;
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#define vimREG ((vimBASE_t *)0xFFFFFE00U)
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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#endif
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