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f51bce3fed
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
81 lines
2.1 KiB
C
81 lines
2.1 KiB
C
/** @file reg_pcr.h
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* @brief PCR Register Layer Header File
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* @date 23.May.2013
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* @version 03.05.01
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*
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* This file contains:
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* - Definitions
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* - Types
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* .
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* which are relevant for the System driver.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __REG_PCR_H__
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#define __REG_PCR_H__
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#include "sys_common.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* Pcr Register Frame Definition */
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/** @struct pcrBase
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* @brief Pcr Register Frame Definition
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*
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* This type is used to access the Pcr Registers.
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*/
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/** @typedef pcrBASE_t
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* @brief PCR Register Frame Type Definition
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*
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* This type is used to access the PCR Registers.
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*/
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typedef volatile struct pcrBase
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{
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uint32 PMPROTSET0; /* 0x0000 */
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uint32 PMPROTSET1; /* 0x0004 */
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uint32 rsvd1[2U]; /* 0x0008 */
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uint32 PMPROTCLR0; /* 0x0010 */
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uint32 PMPROTCLR1; /* 0x0014 */
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uint32 rsvd2[2U]; /* 0x0018 */
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uint32 PPROTSET0; /* 0x0020 */
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uint32 PPROTSET1; /* 0x0024 */
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uint32 PPROTSET2; /* 0x0028 */
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uint32 PPROTSET3; /* 0x002C */
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uint32 rsvd3[4U]; /* 0x0030 */
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uint32 PPROTCLR0; /* 0x0040 */
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uint32 PPROTCLR1; /* 0x0044 */
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uint32 PPROTCLR2; /* 0x0048 */
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uint32 PPROTCLR3; /* 0x004C */
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uint32 rsvd4[4U]; /* 0x0050 */
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uint32 PCSPWRDWNSET0; /* 0x0060 */
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uint32 PCSPWRDWNSET1; /* 0x0064 */
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uint32 rsvd5[2U]; /* 0x0068 */
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uint32 PCSPWRDWNCLR0; /* 0x0070 */
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uint32 PCSPWRDWNCLR1; /* 0x0074 */
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uint32 rsvd6[2U]; /* 0x0078 */
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uint32 PSPWRDWNSET0; /* 0x0080 */
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uint32 PSPWRDWNSET1; /* 0x0084 */
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uint32 PSPWRDWNSET2; /* 0x0088 */
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uint32 PSPWRDWNSET3; /* 0x008C */
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uint32 rsvd7[4U]; /* 0x0090 */
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uint32 PSPWRDWNCLR0; /* 0x00A0 */
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uint32 PSPWRDWNCLR1; /* 0x00A4 */
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uint32 PSPWRDWNCLR2; /* 0x00A8 */
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uint32 PSPWRDWNCLR3; /* 0x00AC */
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} pcrBASE_t;
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/** @def pcrREG
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* @brief Pcr Register Frame Pointer
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*
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* This pointer is used by the system driver to access the Pcr registers.
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*/
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#define pcrREG ((pcrBASE_t *)0xFFFFE000U)
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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#endif
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